Results 21 to 30 of about 1,809,083 (306)

Radiation-Induced Errors in the Software Level of Real-Time Soft Processing System [PDF]

open access: yes, 2023
FPGAs' and programmable hardware's high performance and flexibility have made them a reasonable choice for space-oriented applications, although susceptible to soft errors. This paper proposes a comprehensive analysis of the effects of microarchitectural
Sarah Azimi   +4 more
core   +1 more source

Error Correction For Soft Errors

open access: yesJournal of Electrical & Electronic Systems, 2018
Radiation induced soft errors are susceptible to most of the electronic products with the development of CMOS technology. A particle striking on any of the electronic products can produce soft errors that can be either single event upset or single event transient. There are various techniques such as FERST, BISER, TMR, DMR, DICE, SEC-DED, DEC-TED, EDAC,
Dhanushya T, Latha T
openaire   +1 more source

Modelling and mitigation of soft-errors in CMOS processors [PDF]

open access: yes, 2014
The topic of this thesis is about soft-errors in digital systems. Different aspects of soft-errors have been addressed here, including an accurate simulation model to emulate soft-errors in a gate-level net list, a simulation framework to study the ...
Rohani, A.
core   +1 more source

Custom Scrubbing for Robust Configuration Hardening in Xilinx FPGAs

open access: yesInstruments, 2019
The usage of SRAM-based Field Programmable Gate Arrays on High Energy Physics detectors is mostly limited by the sensitivity of these devices to radiation-induced upsets in their configuration.
Raffaele Giordano   +3 more
doaj   +1 more source

Application Specified Soft-Error Failure Rate Analysis Using Sequential Equivalence Checking Techniques

open access: yesTsinghua Science and Technology, 2020
Soft errors have become a critical challenge as a result of technology scaling. Existing circuit-hardening techniques are commonly associated with prohibitive overhead of performance, area, and power.
Tun Li, Qinhan Yu, Hai Wan, Sikun Li
doaj   +1 more source

Collective Pointing: Protecting Pointer ValuesAgainst Soft Errors [PDF]

open access: yes, 2015
Soft errors are becoming a significant design concern for microprocessor designers to make reliable systems with today’s manufacturing technology. Its occurrence rate (Soft Error Rate – SER) increases with lower supply voltage, higher frequency and ...
Ergin, Oguz   +2 more
core   +2 more sources

28nm Fault-Tolerant Hardening-by-Design Frequency Divider for Reducing Soft Errors in Clock and Data Recovery

open access: yesIEEE Access, 2019
A fault-tolerant hardening-by-design frequency divider has been proposed for clock and data recovery in a 28-nm CMOS process. By means of the mandatory updating mechanism, the proposed divider can update the state of the D flip-flops from an error state ...
Hengzhou Yuan   +5 more
doaj   +1 more source

Fully Adaptive Stochastic Handling of Soft-Errors in Real-Time Systems

open access: yesIEEE Access, 2021
In the design of real-time systems, it is becoming increasingly important to take soft-error tolerance into account. While hardening techniques such as error detection and error correction enable us to build systems that can better tolerate soft-errors ...
Hyung-Chan An, Hoeseok Yang
doaj   +1 more source

The Analysis of Soft Error in C-Elements [PDF]

open access: yesIndonesian Journal of Electrical Engineering and Computer Science, 2018
Soft errors are a serious concern in state holders as it can cause temporarily malfunction of the circuit. C-element is one of the state holders that is used widely in the asynchronous circuit. In this paper, the investigation will focus on the vulnerability of two types of C-element towards soft errors.
Norhuzaimin Julai   +2 more
openaire   +1 more source

Fault Detection for ASIC Design Reliability on Resistive Delay Faults and Strength-Based Soft-Errors

open access: yes, 2010
Soft-errors (SEs) and delay faults (DFs) frequently occur in modern high-density, high-speed, low-power VLSI circuits. Therefore, SE hardened design and DF testing are essential. This thesis introduces two novel methods for soft-error detection and delay
Mohammad R.S. Javaheri (10863036)
core   +1 more source

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