Results 1 to 10 of about 2,496 (168)

Enabling static random-access memory cell scaling with monolithic 3D integration of 2D field-effect transistors [PDF]

Nature Communications
Static Random-Access Memory (SRAM) cells are fundamental in computer architecture, serving crucial roles in cache memory, buffers, and registers due to their high-speed performance and low power consumption.
Muhtasim Ul Karim Sadaf, Ziheng Chen, Shiva Subbulakshmi Radhakrishnan, Yongwen Sun, Lei Ding, Andrew R. Graves, Yang Yang, Joan M. Redwing, Saptarshi Das   +8 more
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Performance Analysis Of SRAM and Dram in Low Power Application [PDF]

E3S Web of Conferences, 2023
All electronic systems must function quickly in the current environment, and 80 percent of electronic chips have memory components. SRAM (Static Random Access Memory) has thus become a major key component in many VLSI Chips in order to reduce the size of
Yuvaraj S., Padmanaban D., PraveenKumar G., Sahu Satendra, Umida Masharipova, Yokeshwaran R.   +5 more
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A Comparative Study of Single- and Dual-Threshold Voltage SRAM Cells

Journal of Telecommunications and Information Technology, 2023
In this paper, a comparison has been drawn between 5 transistor (5T), 6T and 7T SRAM cells. All the cells have been designed using both single-threshold (conventional) and dual-threshold (dual-Vt) voltage techniques.
Pragya Kushwaha, Amit Chaudhry
doaj   +1 more source

Monolithic 3D 6T-SRAM Based on Newly Designed Gate and Source/Drain Bottom Contact Schemes

IEEE Access, 2021
For the first time, we suggested that the monolithic 3D (M3D) static random access memory (SRAM) with gate and S/D bottom contact (GBC and SDBC) schemes (SRAMSDGBC) and analyzed they could significantly improve the power, performance, and area (PPA ...
Junjong Lee, Jun-Sik Yoon, Jinsu Jeong, Seunghwan Lee, Sanguk Lee, Rock-Hyun Baek   +5 more
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NS-SRAM: Neighborhood Solidarity SRAM for Reliability Enhancement of SRAM Memories [PDF]

2016 Euromicro Conference on Digital System Design (DSD), 2016
Technology shift and voltage scaling increased the susceptibility of Static Random Access Memories (SRAMs) to errors dramatically. In this paper, we present NS-SRAM, for Neighborhood Solidarity SRAM, a new technique to enhance error resilience of SRAMs by exploiting the adjacent memory bit data. Bit cells of a memory line are paired together in circuit
Alouani, I., Ahangari, Hamzeh, Öztürk, Özcan, Niar, S.   +3 more
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Performance evaluation of SRAM design using different field effect transistors [PDF]

E3S Web of Conferences, 2023
SRAM (Static Random Access Memory) is one of the type of memory which holds the data bit without periodic refreshment. Compared with DRAM (Dynamic Random Access Memory) which requires periodic refreshment of data bit stored in it.
C. Venkataiah, Y. Mallikarjuna Rao, Jayamma Manjula, M.K. Linga Murthy, S. Feroz Shah Ahmed, Alzubaidi Laith H.   +5 more
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Performance and Stability Analysis of Built-In Self-Read and Write Assist 10T SRAM Cell

Active and Passive Electronic Components, 2023
This work presents the performance and stability analysis of the proposed built-in self-read and write assist 10T SRAM (BSRWA 10T) for better performance in terms of thermal stability and fast write access, which is suitable for military and aerospace ...
Chokkakula Ganesh, Fazal Noorbasha
doaj   +1 more source

Low Leakage and Robust Sub-threshold SRAM Cell Using Memristor [PDF]

International Journal of Electronics and Telecommunications, 2022
This work aims to improve the total power dissipation, leakage currents and stability without disturbing the logic state of SRAM cell with concept called sub-threshold operation.
Zeba Mustaqueem, Abdul Quaiyum Ansari, Md Waseem Akram   +2 more
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An SRAM Compiler for Monolithic-3-D Integrated Circuit With Carbon Nanotube Transistors

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2021
This article presents monolithic-3-D (M3D) SRAM arrays using multiple tiers of carbon nanotube (CNT) transistors. The compiler automatically generates single-tier 2-D SRAM subarrays and multitier 3-D SRAM subarrays with different tiers for cells and ...
Daehyun Kim, Edward Lee, Jamin Seo, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay   +5 more
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SRAM-Based PUF Readouts

Scientific Data, 2023
AbstractLarge-scale parameter characterization of Physical Unclonable Functions (PUFs) is of paramount importance in order to assess the quality and thus the suitability of such PUFs which would then be developed as an industrial-grade solution for hardware root of trust.
Sergio Vinagrero, Honorio Martin, Alice de Bignicourt, Elena-Ioana Vatajelu, Giorgio Di Natale   +4 more
openaire   +5 more sources