Results 11 to 20 of about 55,876 (211)
ETRI Journal, 2023 In this study, we designed a 6T-SRAM cell using 16-nm CMOS process and analyzed the performance in terms of read-speed latency. The temperaturedependent Cu and multilayered graphene nanoribbon (MLGNR)-based nanointerconnect materials is used throughout ...
Sandip Bhattacharya +8 more
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The impact of random doping effects on CMOS SRAM cell [PDF]
, 2004 The SRAM has a very constrained cell area and is consequently sensitive to the intrinsic parameter fluctuations ubiquitous in decananometer scale MOSFETs.
Asenov, A., Cheng, B., Roy, S.
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The Development of a 9-Item Scale to Measure Anti-Immigrant Attitude toward the Middle East Refugees [PDF]
Romanian Journal of Applied Psychology, 2020 The aims of this research were (1) to develop a valid and reliable instrument for measuring an anti-immigrant attitude toward the Middle East refugees, (2) to test whether ethnic minority political exclusionism and national attachment and self-sacrifice ...
Zlatko Šram
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UTB SOI SRAM cell stability under the influence of intrinsic parameter fluctuation [PDF]
, 2005 Intrinsic parameter fluctuations steadily increases with CMOS technology scaling. Around the 90nm technology node, such fluctuations will eliminate much of the available noise margin in SRAM based on conventional MOSFETs.
Asenov, A. +4 more
core +1 more source
Embedded intelligent SRAM [PDF]
Proceedings of the 40th conference on Design automation - DAC '03, 2003 Many embedded systems use a simple pipelined RISC processor for computation and an on-chip SRAM for data storage. We present an enhancement called Intelligent SRAM (ISRAM) that consists of a small computation unit with an accumulator that is placed near the on-chip SRAM. The computation unit can perform operations on two words from the same SRAM row or
Prabhat Jain +2 more
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A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs [PDF]
, 2009 The continues improvement of manufacturing technologies allows the realization of integrated circuits containing an ever increasing number of transistors. A major part of these devices is devoted to realize SRAM blocks.
Di Carlo, Stefano +5 more
core +1 more source
Impact of random dopant induced fluctuations on sub-15nm UTB SOI 6T SRAM cells [PDF]
, 2005 The CMOS scaling increases the impact of intrinsic parameter fluctuation on the yield and functionality of SRAM. A statistical circuit simulation framework which can fully capture intrinsic parameter fluctuation information into the compact model has ...
Asenov, A. +4 more
core +1 more source
Občutljivost za sram in njeni korelati pri parih
Psihološka Obzorja, 2010 Raziskava preučuje povezanost med tremi lestvicami instrumenta TOSCA-3 (občutljivost za sram, občutljivost za krivdo ter eksternalizacija) ter stresom, depresivnostjo, strahom pred intimo in stilom navezanosti pri 68 heteroseksualnih parih v trajnih ...
Tomaž Erzar +2 more
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Investigating SRAM PUFs in large CPUs and GPUs [PDF]
, 2015 Physically unclonable functions (PUFs) provide data that can be used for cryptographic purposes: on the one hand randomness for the initialization of random-number generators; on the other hand individual fingerprints for unique identification of ...
Bernstein, Daniel J. +2 more
core +5 more sources
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017 Static Random Access Memories (SRAMs) are considered a major bottleneck in high performance System-on-Chip (SoC) design and there is a large demand for high performance SRAMs with minimal energy consumption. Time speculation techniques such as Razor ease timing guardbands to improve performance or reduce energy consumption.
Elnaz Ebrahimi 0001 +2 more
openaire +3 more sources