Results 41 to 50 of about 37,708 (227)

Research on the Security of SRAM-Based FPGAs in the Era of Artificial Intelligence

Journal of Low Power Electronics and Applications
SRAM-based FPGAs, with their flexible programmability and parallel execution features, have been widely used, and the security of such devices has drawn significant attention.
Jing Zhou, Xiangyu Zhao, Shengbing Zhang, Lei Chen, Ke Xiao, Shuo Wang   +5 more
doaj   +1 more source

Neuromorphic Denoising with Fully Analog Memristive In‐Memory Computing

Advanced Intelligent Systems, EarlyView.
This article borrows the concepts of episodic memory in human brains to experimentally implement a memristor‐based neuromorphic denoising process. A homogeneous memristor processing unit is experimentally demonstrated for both temporal storage and neural network computation, imitating the synapses in the human brain.
Daijing Shi, Teng Zhang, Yuqi Li, Yaoyu Tao, Bonan Yan, Yuchao Yang   +5 more
wiley   +1 more source

An area-efficient 2-D convolution implementation on FPGA for space applications [PDF]

, 2011
The 2-D Convolution is an algorithm widely used in image and video processing. Although its computation is simple, its implementation requires a high computational power and an intensive use of memory.
Stefano Di Carlo, Rolfo, Daniele, Indaco, Marco, Tiotto, Gabriele, Daniele Rolfo, Gambardella, Giulio, Gabriele Tiotto, Giulio Gambardella, Paolo Prinetto, Prinetto, Paolo Ernesto, Marco Indaco, Di Carlo, Stefano   +11 more
core   +1 more source

On the Evaluation of the PIPB Effect within SRAM-based FPGAs

2019 IEEE European Test Symposium (ETS), 2019
SRAM-based FPGAs are widely used in mission critical applications. Due to the increasing working frequency and technology scaling of ultra-nanometer technology, Single Event Transients (SETs) are becoming a major source of errors for these devices.
Corrado de sio, Sarah Azimi, Luca sterpone   +2 more
openaire   +2 more sources

Review of Memristors for In‐Memory Computing and Spiking Neural Networks

Advanced Intelligent Systems, Volume 8, Issue 3, March 2026.
Memristors uniquely enable energy‐efficient, brain‐inspired computing by acting as both memory and synaptic elements. This review highlights their physical mechanisms, integration in crossbar arrays, and role in spiking neural networks. Key challenges, including variability, relaxation, and stochastic switching, are discussed, alongside emerging ...
Mostafa Shooshtari, Teresa Serrano‐Gotarredona, Bernabé Linares‐Barranco   +2 more
wiley   +1 more source

Cryogenic Neuromorphic Synaptic Behavior in 180 nm Silicon Transistors for Emerging Computing Systems

Advanced Intelligent Systems, Volume 8, Issue 2, February 2026.
This study investigates the neuromorphic plasticity behavior of 180 nm bulk complementary metal oxide semiconductor (CMOS) transistors at cryogenic temperatures. The observed hysteresis data reveal a signature of synaptic behavior in CMOS transistors at 4 K.
Fiheon Imroze, Bhavani Yalagala, Naveen Kumar, Mostafa Elsayed, Meraj Ahmad, Robert Graham, Vihar Georgiev, Hadi Heidari, Martin Weides   +8 more
wiley   +1 more source

Técnicas de inyección de fallos basadas en FPGAs para la evaluación de la tolerancia a fallos de tipo SEU en circuitos digitales [PDF]

, 2007
Este trabajo de tesis doctoral presenta nuevas técnicas de inyección de fallos transitorios en elementos de memoria, que permiten la evaluación del comportamiento de los complejos circuitos digitales actuales en presencia de fallos SEU (Single Event ...
Portela García, Marta
core  

Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing

International Journal of Reconfigurable Computing, 2017
In modern SRAM based Field Programmable Gate Arrays, a Look-Up Table (LUT) is the principal constituent logic element which can realize every possible Boolean function. However, this flexibility of LUTs comes with a heavy area penalty.
Ali Asghar, Muhammad Mazher Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez, Muhammad Rashid   +5 more
doaj   +1 more source

An Integrated Real-Time FMCW Radar Baseband Processor in 40-nm CMOS

IEEE Access, 2023
In this paper, a pipelined frequency-modulated continuous-wave (FMCW) radar baseband processor applied to real-time applications is proposed and implemented in 40-nm CMOS technology.
Mohan Guo, Dixian Zhao, Qisong Wu, Jiarui Wu, Diwei Li, Peng Zhang   +5 more
doaj   +1 more source

Fine-grain leakage optimization in SRAM based FPGAs [PDF]

Proceedings of the 15th ACM Great Lakes symposium on VLSI, 2005
FPGAs are evolving at a rapid pace with improved performance and logic density. At the same time, trends in technology scaling makes leakage power a serious concern for designers. In this paper, we propose a hierarchical look-up table (LUT) structure for FPGAs to improve leakage power consumption.
Somsubhra Mondal, Seda Ogrenci Memik
openaire   +1 more source