Results 41 to 50 of about 138 (136)

Virtual Page‐Based Flash Translation Layer for Compressed Solid‐State Drives

Electronics Letters, Volume 62, Issue 1, January/December 2026.
This letter introduces a virtual page‐based flash translation layer (VPFTL) addressing the asymmetric logical‐to‐physical mappings introduced by data compression in SSDs. By grouping multiple physically related pages into a single virtual page, VPFTL flexibly manages mappings while preserving performance.
Yifan Shen, Jianjun Luo, Boming Huang, Wenyi Yang, Wenhao Yang, Hangxiang Chen   +5 more
wiley   +1 more source

4‐Channel Ultrasound Digital Beamforming and Demodulator for SiP Packaging in 28 Nm CMOS

Electronics Letters, Volume 62, Issue 1, January/December 2026.
ABSTRACT Ultrasound diagnosis, vital in modern medical practices due to its non‐invasive and convenient nature, is significantly enhanced by digital imaging chips, which surpass analogue versions in providing improved spatial, temporal and contrast resolutions.
Chenhui Zhou, Tianyu Zhai, Fan Ye, Junyan Ren   +3 more
wiley   +1 more source

Efficient turbo product code decoder with Build‐In SRAM‐based transpose memory

Electronics Letters
Turbo product codes (TPCs) have been widely used for bit error correction in high‐speed applications such as data storage. This letter introduces an efficient hard‐input hard‐output iterating TPC decoder module. A transpose memory utilizing static random
Jianjun Luo, Xiaoyu Xu, Yifan Shen, Boming Huang, Wenkui Wang   +4 more
doaj   +1 more source

Detection of Unknown Radar Pulses Using Spiking Neural Networks

IET Radar, Sonar &Navigation, Volume 20, Issue 1, January/December 2026.
This article proposes to use spiking neural networks (SNNs) to detect multiple pulses in observation windows from a superheterodyne receiver. The method is described from encoding to postprocessing. New metrics are introduced to compare the proposed detection method to the energy detector (ED), to a detection based on difference Of boxes (DOB) filters ...
Alexia Tachet, Fabrice Comblet, Ali Khenchaf   +2 more
wiley   +1 more source

Energy Management for Low‐Cost and High‐Efficiency of Hybrid Electric Vehicles

International Journal of Energy Research, Volume 2026, Issue 1, 2026.
Hybrid electric vehicles (HEVs) represent a critical transitional technology toward sustainable transportation, yet the high cost of advanced energy management systems remains a barrier to widespread adoption. This paper challenges the prevailing assumption that high‐performance HEV control requires expensive computing platforms by demonstrating that a
Marwa Ben Slimene, Mohamed Arbi Khlifi, Faisal Mahroogi, Iskander Tlili, Cheng Du   +4 more
wiley   +1 more source

A programmable multi-bit fault injection for embedded system

Sustainable Engineering and Innovation
Fault injection technique is commonly used to intentionally introducing attack on embedded systems, specifically advanced FPGAs and microcontrollers. The FPGA-based embedded system uses SRAM for storage of configuration data.
Rahul Shandilya, R. K. Sharma
doaj   +1 more source

Hybrid and Depth Separable Convolutional Neural Network Approaches for an Efficient and Accurate Siren Recognition With Resource Limited Devices

Journal of Sensors, Volume 2026, Issue 1, 2026.
Emergency vehicles, such as ambulances, fire trucks, and police cars, play a crucial role in road traffic management. While these vehicles typically use sirens for identification, many drivers rely primarily on visual cues. This reliance presents challenges in scenarios where the emergency vehicles are obscured or outside the observer’s field of vision,
Rakshaa Munirathinam, Stanislav Vitek, Deepali   +2 more
wiley   +1 more source

Symbolic Reservoir Computing within Memristive Crossbar Arrays as a Cellular Automata

Advanced Intelligent Systems, Volume 7, Issue 12, December 2025.
In quest of a neuro‐symbolic system with both strong intelligent computing capability and better explainability, a memristor crossbar array‐based cellular automata (symbolic model) for reservoir computing (neural network) is proposed and experimentally demonstrated using an algorithm–hardware codesign approach.
Yunpeng Guo, Chenfei Miao, Xinxin Wang, Xue Liu, Cheng Ma, Lidan Wang, Shukai Duan, Wenrui Duan, Huanglong Li   +8 more
wiley   +1 more source

Hardware reconfigurable coding and evolution algorithm based on evolvable hardware

Tongxin xuebao, 2012
A planar mapping function increments chromosome coding method based on FPGA platform with SRAM-architecture was proposed.The method could improve hardware reconfiguration efficiency by coding mapping realized by double platform mapping of binary ...
Ting WANG, Ju-long LAN, Jun-ting WU
doaj   +2 more sources

What is next for LLMs? Pushing the boundaries of next‐gen AI computing hardware with photonic chips

Nanophotonics, Volume 14, Issue 22, Page 3499-3525, 01 November 2025.
Abstract Large language models (LLMs) are rapidly pushing the limits of contemporary computing hardware. For example, training GPT‐3 has been estimated to consume around 1,300 MWh of electricity, and projections suggest future models may require city‐scale (gigawatt) power budgets.
Renjie Li, Qi Xin, Wenjie Wei, Sixuan Mao, Erik Ma, Zijian Chen, Jingxing Gao, Malu Zhang, Haizhou Li, Zhaoyu Zhang   +9 more
wiley   +1 more source