Results 51 to 60 of about 138 (136)

Voltage‐Summation‐Based Compute‐in‐Memory Technology with Capacitive Synaptic Devices

Advanced Intelligent Systems, Volume 7, Issue 10, October 2025.
Compute‐in‐memory (CIM) technologies leveraging capacitive coupling offer significant advantages in energy efficiency and IR‐drop elimination. This work introduces voltage‐summation‐based CIM technology, employing capacitive synaptic devices for matrix–vector multiplication.
Jung Nam Kim, Yong Woo Kim, Boram Kim, Doo‐Hyun Kim, Gil Sung Lee, Dong‐Hyuk Chae, Minkyu Je, Minsuk Koo, Yoon Kim   +8 more
wiley   +1 more source

Hardware Security in the Connected World

WIREs Data Mining and Knowledge Discovery, Volume 15, Issue 3, September 2025.
Depicts the components covered in the article. ABSTRACT The rapid proliferation of the Internet of Things (IoT) has integrated billions of smart devices into our daily lives, generating and exchanging vast amounts of critical data. While this connectivity offers significant benefits, it also introduces numerous security vulnerabilities.
Durba Chatterjee, Shuvodip Maitra, Nimish Mishra, Shubhi Shukla, Debdeep Mukhopadhyay   +4 more
wiley   +1 more source

FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo3 Framework

Sensors, 2018
Cyber-Physical Systems are experiencing a paradigm shift in which processing has been relocated to the distributed sensing layer and is no longer performed in a centralized manner.
Alfonso Rodríguez, Juan Valverde, Jorge Portilla, Andrés Otero, Teresa Riesgo, Eduardo de la Torre   +5 more
doaj   +1 more source

Securing the Future: Lightweight Blockchain Solutions for IIoT and IoT Networks

SECURITY AND PRIVACY, Volume 8, Issue 4, July/August 2025.
ABSTRACT This paper presents an innovative lightweight blockchain architecture tailored for Internet of Things (IoT) and Industrial Internet of Things (IIoT) applications. Building upon Byzantine Fault Tolerance (BFT) and Directed Acyclic Graph (DAG) technologies, our proposed BFT‐DAG framework introduces key enhancements to optimize its performance in
Fatemeh Stodt, Mohammed Alshawki, Christoph Reich, Peter Ligeti, Fabrice Theoleyre   +4 more
wiley   +1 more source

A Review of Performance and Reliability Issues in D Flip‐Flops for Future Artificial Intelligence and Internet of Things Applications

IET Circuits, Devices &Systems, Volume 2025, Issue 1, 2025.
In this paper, various D flip‐flops (FFs) (DFFs) are studied and analyzed based on the performance and reliability effects of different architectures, technology, area, power, delay, and several other key performance parameters of DFFs. Based on these parameters, a few selected DFFs such as C2SFF, conditional‐bridging FF (CBFF)‐S, self‐shut‐off pulsed ...
Syeda Hurmath Juveria, R. Shashank, J. Ajayan, Amit Krishna Dwivedi, D. Nirmal, Shashikant Patil   +5 more
wiley   +1 more source

Sketch-based data plane hardware model for software-defined measurement

Tongxin xuebao, 2017
A sketch-based data plane hardware model for software-defined measurement was introduced,and it was implemented in the programmable network device NetMagic.A generic sketch model for collecting flow-level data using high-speed memories on the FPGA was ...
Mian DAI, Guang CHENG
doaj   +2 more sources

Characteristics and Mechanisms of Single Event Effects Caused by Atmospheric Neutrons in System in Package Device

Yuanzineng kexue jishu
To investigate the effects of atmospheric neutron radiation effects on a system-in-package (SiP) device, single event upset (SEU) and single event functional interruption (SEFI) were focused on in the experiment.
YE Jiefeng1, 2, LIANG Chaohui2, ZHANG Zhangang2, ZHENG Shunshun1, 2, LEI Zhifeng2, LIU Zhili3, GENG Gaoying3, HAN Hui1
doaj   +1 more source

Synchronisation, Optimisation and Adaptation of Machine Learning Techniques for Computer Vision in Cyber‐Physical Systems: A Comprehensive Analysis

IET Cyber-Physical Systems: Theory &Applications, Volume 10, Issue 1, January/December 2025.
This systematic analysis aims to offer a unique point to researchers and facilitates this process by allowing researchers to benchmark and compare various techniques, evaluate their effectiveness and establish best practices. It provides evidence‐based insights into optimal strategies for implementation while addressing potential trade‐offs in ...
Kai Hung Tang, Mohamed Chahine Ghanem, Pawel Gasiorowski, Vassil Vassilev, Karim Ouazzane   +4 more
wiley   +1 more source

Comparative Analysis of On-Chip FPGA Memory Architectures for Viterbi Decoder Implementation in DVB Systems [PDF]

JES: Journal of Engineering Sciences
High-definition Digital Video Broadcasting (DVB) systems demand high data rates, resulting in increased hardware complexity and power consumption, with the Viterbi decoder (VD) being a key contributor.
Asmaa Mosbeh, Ali Younis, Hassan Mostafa, Khalil Yousef   +3 more
doaj   +1 more source

Secure ECDSA SRAM-PUF Based on Universal Single/Double Scalar Multiplication Architecture

Micromachines
Physically unclonable functions (PUFs) are crucial for enhancing cybersecurity by providing unique, intrinsic identifiers for electronic devices, thus ensuring their authenticity and preventing unauthorized cloning.
Jingqi Zhang, Zhiming Chen, Xiang He, Kuanhao Liu, Yue Hao, Mingzhi Ma, Weijiang Wang, Hua Dang, Xiangnan Li   +8 more
doaj   +1 more source