Results 71 to 80 of about 138 (136)
A superior ultrafast parallel BMAS architecture for high-resolution medical ultrasound imaging
Scientific ReportsThe proposed work aims to design, a novel ultrafast–parallel beamformer core for medical ultrasound imaging systems that is superior in performance compared to preceding beamformers. The architecture is aimed at achieving high-resolution images using 128
Sreejeesh SG +2 more
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Discover ElectronicsThe rapid growth of the Internet of Things (IoT) and wearable healthcare devices has intensified the need for ultra-low-power Very Large Scale Integration (VLSI) designs that can operate reliably under changing and often unpredictable workloads ...
Ashish Pasaya +2 more
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A single event transient detector in SRAM-based FPGAs
IEICE Electronics Express, 2017 Xu, Xiumin +7 more
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A highly reliable butterfly PUF in SRAM-based FPGAs
IEICE Electronics Express, 2017 Xu, Xiumin +7 more
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Defect tolerant SRAM based FPGAs
Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2002We propose a new approach to redundancy for field programmable gate arrays (FPGAs) which uses a novel reconfiguration network. Modifications are made to the wiring segments and a spare element is incorporated at the end of each row. By using the technique it will be possible to construct arrays 10 times larger than are commercially economic at present.
Jason L. Kelly, Peter A. Ivey
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A fault injection tool for SRAM-based FPGAs
9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003., 2004A fault injection tool for SRAM-based FPGAs based on the fault emulation technique is presented. Faults are injected by modifying the configuration bitstream while this is loaded into the device, without using standard synthesis tools or available commercial software, such as Jbits or similar.
Monica Alderighi +3 more
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An SRAM-based FPGA architecture
Proceedings of Custom Integrated Circuits Conference, 2002An SRAM-based FPGA architecture has been developed using a licensed AT6000 architecture base. The logic-cell architecture exploits an efficient, medium-grained, fixed library cell that implements most frequently used synthesis functions. An internal routing structure enables dense designs using a highly connected grid-based routing system and a ...
S. Gould +7 more
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On the reliability evaluation of sram-based FPGA designs
International Conference on Field Programmable Logic and Applications, 2005., 2005Benefits of field programmable gate arrays (FPGAs) have lead to a spectrum of use ranging from consumer products to astronautics. This diversity necessitates the need to evaluate the reliability of the FPGA, because of their high susceptibility to soft errors, which are due to the high density of embedded SRAM cells.
Olivier Héron +2 more
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An automated test framework for SRAM-based FPGA
2015 IEEE 11th International Conference on ASIC (ASICON), 2015An automated test framework for SRAM-based FPGA is presented. With the framework, test configurations of different categories can be partially or completely generated, and the tests be running using the generated configurations. Data driven design provides the test framework the flexibility of change the user interface and the command line arguments ...
Xuemin Lv +3 more
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