Binary-Weighted Neural Networks Using FeRAM Array for Low-Power AI Computing. [PDF]
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Total Ionizing Dose Effect Simulation Study on 130 nm CMOS Processor. [PDF]
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An optimized elliptic curve digital signature strategy for resource-constrained devices. [PDF]
Sabbry NH, Levina A.
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Advancing the Frontiers of HfO<sub>2</sub>-Based Ferroelectric Memories: Innovative Concepts from Materials to Applications. [PDF]
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Spike-based time-domain analog weighted-sum calculation model for extremely low power VLSI implementation of multi-layer neural networks. [PDF]
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A STUDY ON 6T SRAM AND 7T SRAM CELLS
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Oxide semiconductor gain cell-embedded memory: materials and integration strategies for next generation on-chip memory. [PDF]
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Simultaneously Estimating Process Variation Effect, Work Function Fluctuation, and Random Dopant Fluctuation of Gate-All-Around Silicon Nanosheet Complementary Field-Effect Transistors. [PDF]
Kola SR, Li Y.
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Large-Scale Implementation of Vertical Sidewall and Vertical Multi-Channel WS<sub>2</sub> Nanosheet Field-Effect Transistors for Area-Efficient Integrated Circuit. [PDF]
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The Role of Phase-Change Memory in Edge Computing and Analog In-Memory Computing: An Overview of Recent Research Contributions and Future Challenges. [PDF]
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