Results 1 to 10 of about 22,014 (257)

A Monolithic 3-Dimensional Static Random Access Memory Containing a Feedback Field Effect Transistor [PDF]

open access: yesMicromachines, 2022
A monolithic three-dimensional integrated static random access memory containing a feedback field effect transistor (M3D-FBFET-SRAM) was proposed. The M3D-FBFET-SRAM cell consists of one metal oxide semiconductor field effect transistor (MOSFET) and one ...
Jong Hyeok Oh, Yun Seop Yu
doaj   +2 more sources

One-transistor static random-access memory cell array comprising single-gated feedback field-effect transistors [PDF]

open access: yesScientific Reports, 2021
In this study, we fabricated a 2 × 2 one-transistor static random-access memory (1T-SRAM) cell array comprising single-gated feedback field-effect transistors and examined their operation and memory characteristics.
Sangik Choi   +3 more
doaj   +2 more sources

Performance Degradation in Static Random Access Memory of 10 nm Node FinFET Owing to Displacement Defects [PDF]

open access: yesMicromachines, 2023
We comprehensively investigate displacement-defect-induced current and static noise margin variations in six-transistor (6T) static random access memory (SRAM) based on a 10 nm node fin field-effect transistor (FinFET) using technology computer-aided ...
Minji Bang   +4 more
doaj   +2 more sources

Pitfall of the Strongest Cells in Static Random Access Memory Physical Unclonable Functions [PDF]

open access: yesSensors, 2018
Static Random Access Memory (SRAM) Physical Unclonable Functions (PUFs) are some of the most popular PUFs that provide a highly-secured solution for secret key storage.
Mingyang Gong   +3 more
doaj   +2 more sources

Soft-Error-Resilient Static Random Access Memory with Enhanced Write Ability for Radiation Environments [PDF]

open access: yesMicromachines
As semiconductor technologies advance, SRAM cells deployed in space systems face heightened sensitivity to radiation-induced soft errors. In conventional 6T SRAM, when high-energy particles strike sensitive nodes, single-event upsets (SEUs) may occur ...
Se-Yeon Park, Eun Gyo Jeong, Sung-Hun Jo
doaj   +2 more sources

Electrical Coupling and Simulation of Monolithic 3D Logic Circuits and Static Random Access Memory [PDF]

open access: yesMicromachines, 2019
In order to simulate a circuit by applying various logic circuits and full chip using the HSPICE model, which can consider electrical coupling proposed in the previous research, it is investigated whether additional electrical coupling other than ...
Tae Jun Ahn   +3 more
doaj   +2 more sources

Low-power adiabatic 9T static random access memory

open access: yesThe Journal of Engineering, 2014
In this paper, the authors propose a novel static random access memory (SRAM) that employs the adiabatic logic principle. To reduce energy dissipation, the proposed adiabatic SRAM is driven by two trapezoidal-wave pulses.
Yasuhiro Takahashi   +3 more
doaj   +2 more sources

Enabling static random-access memory cell scaling with monolithic 3D integration of 2D field-effect transistors [PDF]

open access: yesNature Communications
Static Random-Access Memory (SRAM) cells are fundamental in computer architecture, serving crucial roles in cache memory, buffers, and registers due to their high-speed performance and low power consumption.
Muhtasim Ul Karim Sadaf   +8 more
doaj   +2 more sources

Performance evaluation of SRAM design using different field effect transistors [PDF]

open access: yesE3S Web of Conferences, 2023
SRAM (Static Random Access Memory) is one of the type of memory which holds the data bit without periodic refreshment. Compared with DRAM (Dynamic Random Access Memory) which requires periodic refreshment of data bit stored in it.
C. Venkataiah   +5 more
doaj   +1 more source

Security and Privacy of Blockchain-Based Single-Bit Cache Memory Architecture for IoT Systems

open access: yesIEEE Access, 2022
This paper provides an overview of blockchain technology’s security and privacy features, as well as an overview of IoT-based cache memory and single-bit six transistor static random-access memory cell sense amplifier architecture.
Reeya Agrawal   +3 more
doaj   +1 more source

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