A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process
This paper reports a novel full logic compatible 4T2R non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM application.
Meng-Yin Hsu +4 more
doaj +2 more sources
Low-power adiabatic 9T static random access memory
In this paper, the authors propose a novel static random access memory (SRAM) that employs the adiabatic logic principle. To reduce energy dissipation, the proposed adiabatic SRAM is driven by two trapezoidal-wave pulses.
Yasuhiro Takahashi +3 more
doaj +2 more sources
A Monolithic 3-Dimensional Static Random Access Memory Containing a Feedback Field Effect Transistor
A monolithic three-dimensional integrated static random access memory containing a feedback field effect transistor (M3D-FBFET-SRAM) was proposed. The M3D-FBFET-SRAM cell consists of one metal oxide semiconductor field effect transistor (MOSFET) and one ...
Jong Hyeok Oh, Yun Seop Yu
doaj +2 more sources
Radiation tolerant capacitor-SRAM without area overhead
In memory semiconductors such as a static random access memory (SRAM), a common problem is soft errors under radiation environment. These soft errors cause bit flips, which are referred to as single event upsets (SEUs). Some radiation-hardened SRAM cells
Eunju Jo +4 more
doaj +2 more sources
Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory
Static random access memory (SRAM) is the most commonly employed semiconductor in the design of on-chip processor memory. However, it is unlikely that the SRAM technology will have a cell size that will continue to scale below 45 nm, due to the leakage ...
Luís Vitório Cargnini +4 more
doaj +2 more sources
S²RAM: Optimization of SRAM With Memory Access Patterns
This paper presents a static sequential-random-access memory (S2RAM) designed to enable low-power and high-performance operations for workloads involving sequential memory accesses.
Woong Choi
doaj +2 more sources
Ultra-low leakage static random access memory design [PDF]
An ultra-low leakage static random-access memory (SRAM) cell structure with 8 transistors is proposed in this paper. Compared to the 6T SRAM and other existing 8T SRAM cells, leakage power of the proposed cell in hold mode reduced significantly.
Mohd. Masood Ahmad +3 more
core +2 more sources
Influence of parasitic capacitance variations on 65 nm and 32 nm predictive technology model SRAM core-cells [PDF]
The continuous improving of CMOS technology allows the realization of digital circuits and in particular static random access memories that, compared with previous technologies, contain an impressive number of transistors.
Stefano Di Carlo +7 more
core +1 more source
Improved reliability single loop single feed 7T SRAM cell for biomedical applications
Portable biomedical devices are born to reach a maximum number of people at an effective cost, and because of their small size and battery operation, the impact of portable medical devices is huge.
Ashish Panchal +5 more
doaj +1 more source
Design and Analysis of an Ultra-Dense, Low-Leakage, and Fast FeFET-Based Random Access Memory Array
High static power associated with static random access memory (SRAM) represents a bottleneck in increasing the amount of on-chip memory. Novel, emerging nonvolatile memories such as spintransfer torque magnetic random access memory (STT-RAM), resistive ...
Dayane Reis +11 more
doaj +1 more source

