Results 201 to 210 of about 17,853 (211)

Asymmetric and Adaptive Error Correction in STT-MRAM

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Surendra Hemaram, Mehdi B. Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Tommaso Marinelli, Valerio Pica, Gouri Sankar Kar   +7 more
openaire   +1 more source

Reliability of 8Mbit Embedded-STT-MRAM in 28nm FDSOI Technology

2019
S H Hwang, S Pae, Y J Song
exaly  

Demonstration of an MgO Based Anti-Fuse OTP Design Integrated With a Fully Functional STT-MRAM at the Mbit Level

2015
Dongna Shen, Vinh Lam, Po-Kang Wang
exaly  

Highly Reliable and Low-Power Nonvolatile Cache Memory With Advanced Perpendicular STT-MRAM for High-Performance CPU

2014
Junichi Itô, Kazutaka Ikegami, Naoharu Shimomura   +2 more
exaly  

Overview of Reliability in Scaling Embedded STT-MRAM

2025 IEEE International Reliability Physics Symposium (IRPS)
Hyunsung Jung, Yoon-Jong Song, Seungpil Ko, Jeong-Heon Park, Su-Jin Ahn   +4 more
openaire   +2 more sources

DTCO for Fast STT-MRAM Periphery Operation

2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
Ahmed Hossam-Eldeen, Bowen Wang, Priyanka Pandey, Marie Garcia Bardon, Fernando García-Redondo   +4 more
openaire   +2 more sources

A Fully-Functional 90nm 8Mb STT MRAM Demonstrator Featuring Trimmed, Reference Cell-Based Sensing

2015
Yutaka Nakamura, Po-Kang Wang, Guénolé Jan   +2 more
exaly  

MTJ element for STT MRAM

2014
KULA WITOLD, TONG RU-YING, JAN GUENOLE, WANG YU-JEN   +3 more
openaire   +1 more source

MONOLITHIC MULTI-CHANNEL ADAPTABLE STT-MRAM

2014
KANG SEUNG H, ZHU XIAOCHUN
openaire   +2 more sources

PAD DESIGN FOR STT-MRAM

2009
XIA WILLIAM, KANG SEUNG H
openaire   +1 more source