Results 11 to 20 of about 29,463 (289)
Performance analysis of 4-bit ternary adder and multiplier using CNTFET for high speed arithmetic circuits [PDF]
Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
C. Venkataiah +6 more
doaj +1 more source
Design and Application of Memristive Balanced Ternary Univariate Logic Circuit
This paper proposes a unique memristor-based design scheme for a balanced ternary digital logic circuit. First, a design method of a single-variable logic function circuit is proposed.
Xiaoyuan Wang +4 more
doaj +1 more source
In this paper, the design of ternary logic gates (standard ternary inverter, ternary NAND, ternary NOR) based on carbon nanotube field effect transistor (CNTFET) and resistive random access memory (RRAM) is proposed.
Furqan Zahoor +3 more
doaj +1 more source
Two Efficient Ternary Adder Designs Based On CNFET Technology [PDF]
Full adder is one of the essential circuits among the various processing elements used in VLSI and other technologies circuits, because they are mainly employed in other arithmetic circuits, such as multi-digit adders, subtractors, and multipliers.
Masoud Mahjoubi +3 more
doaj +1 more source
Design of ternary full-adder and full-subtractor using pseudo NCNTFETs
Now-a-days, the binary logic system has intensified by scaling the field effect transistor (FET). However, due to the effectiveness of scaling the FET, ternary logics became more popular.
SV RatanKumar +2 more
doaj +1 more source
Design of Ternary Logic and Arithmetic Circuits Using GNRFET
Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
Zarin Tasnim Sandhie +2 more
doaj +1 more source
The ternary quantum-dot cell and ternary logic [PDF]
Quantum-dot cellular automata (QCAs) are increasingly becoming one of the most promising candidates for the alternative processing platform of the future. Since their advent in the early 1990s the required technological processes, as well as the QCA structures that implement the basic and functionally complete set of binary logic functions, have been ...
I Lebar Bajec, N Zimic, M Mraz
openaire +1 more source
With the approaching end of Moore’s Law (that the number of transistors in a dense integrated circuit doubles every two years), the logic data density in modern binary digital integrated circuits can hardly be further improved due to the physical ...
Mingqiang Huang +4 more
doaj +1 more source
Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology [PDF]
:This paper presents a novel design of a ternary multiplierbased on graphene nanoribbon field-effect transistor(GNRFET). GNRFET, as a new material with superiorphysical and electronic properties, can be a good choiceinstead of conventional devices such ...
Zahra Rohani +1 more
doaj +1 more source
An Optimal Gate Design for the Synthesis of Ternary Logic Circuits [PDF]
Department of Electrical EngineeringOver the last few decades, CMOS-based digital circuits have been steadily developed. However, because of the power density limits, device scaling may soon come to an end, and new approaches for circuit designs are ...
KANG, SEOKHYEONG +2 more
core +1 more source

