Results 81 to 90 of about 2,142 (219)

Band-Offset Engineering for GeSn-SiGeSn Hetero Tunnel FETs and the Role of Strain

IEEE Journal of the Electron Devices Society, 2015
In this paper a simulation study of the effect of conduction and valence band offsets on the subthreshold swing (SS) of a double-gate tunnel field-effect transistor (TFET) with gate-overlapped source is presented.
Saurabh Sant, Andreas Schenk
doaj   +1 more source

Gate Field‐Induced Dynamic Schottky Barrier Height Reduction in Bilayer MoS2 for Sub‐60 mV/dec Schottky Barrier FETs

Advanced Electronic Materials, Volume 11, Issue 21, December 17, 2025.
Vertical electric‑field‑induced bandgap narrowing in bilayer MoS2 dynamically reduces the Schottky barrier height, achieving sub‑60 mV/dec switching. Incorporating band‑edge shifts estimated from DFT results into transport simulations, the bilayer MoS2 SB‑FET achieves a 44.7 mV/dec subthreshold swing and 38 % faster CMOS inverter switching with 5 ...
Gyeong Min Seo, Jeong Wook Kim, Byoung Don Kong   +2 more
wiley   +1 more source

Engineering SnSe Isolated State Steep‐Slope MOSFETs for High‐Performance Applications

Advanced Electronic Materials, Volume 11, Issue 20, December 3, 2025.
Steep‐slope MOSFETs for high‐performance and low‐power applications are achieved by applying asymmetric underlap, strain, and a gate‐all‐around design. Abstract To overcome Boltzmann thermal limitation, the study investigates isolated‐state field‐effect transistors based on armchair SnSe nanoribbons using first‐principles calculations and quantum ...
Lu Qin, Juan Lyu, Shenyuan Yang, Shun Song, Jian Gong   +4 more
wiley   +1 more source

Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications

, 2016
International audienceIn this paper, we propose a novel TFET Flip-Flop (TFET-FF) designed to address the requirements of ULP (Ultra-Low-Power) applications, like IoT (Internet of Things), while maintaining high performance.
Makosiej, Adam, Navneet Gupta, Amara Amara, Amara, Amara, Anghel, Costin, Adam Makosiej, Costin Anghel, Vladimirescu, Andrei, Gupta, Navneet, Andrei Vladimirescu   +9 more
core   +1 more source

Gallium Nitride in Heterogeneous Photocatalysis: Fundamental Insights and Emerging Trends

ChemistryEurope, Volume 3, Issue 6, November 11, 2025.
Gallium nitride is a binary III–V direct band gap semiconductor. Recently, it has emerged as a promising material for next‐generation heterogeneous photocatalytic systems due to its unique electronic and structural properties. This review outlines the fundamental principles and key design strategies of heterogeneous photocatalysis and provides a ...
Hyotaik Kang, Chao‐Jun Li
wiley   +1 more source

Gate Field Plate Structure for Subthreshold Swing Improvement of Si Line-Tunneling FETs

IEEE Access, 2019
Tunnel field-effect transistors (TFETs) are promising for use in ultralow-power applications owing to their distinct band-to-band tunneling operation.
Xiangzhan Wang, Zhouquan Tang, Lei Cao, Jingchun Li, Yang Liu   +4 more
doaj   +1 more source

Impact of process and device dimensions on Bio-TFET Sensitivity

, 2019
This paper reports the impact of process and dimensions on the sensitivity of the double gate Bio-TFET for drain and source underlap structures. The Bio-TFET is simulated using different dielectric permittivity materials localized over the drain to gate ...
Agopian, P. G.D. [UNESP], Martino, J. A., Macambira, C. N.   +2 more
core   +1 more source

Design of a Hybrid SET-TFET Nanoscale IC for RF and Microwave Frequencies

, 2022
Device size has now reached the nanoscale range due to advancements in technology and scaling in the fields of very large-scale integration. The single-electron transistor (SET) is a promising solid-state device that can provide an extension for Moore ...
Hazzazi, Fawwaz, Daniels-Race, Theda, Xu, Jian, Adesina, Naheem O., Chavda, Chintan P., Veronis, Georgios   +5 more
core   +1 more source

Vertical Nanowire TFET Diameter Influence on Intrinsic Voltage Gain for Different Inversion Conditions [PDF]

, 2020
In this work, the impact of the nanowire TFET diameter on analog parameters in "weak" and "strong inversion" conditions is analyzed. Its relation with the current conduction mechanism is also studied.
C C M Bordallo, P G D Agopian, V B Sivieri, E Simoen, A Vandooren, J A Martino, R Rooyackers, C Claeys, A Thean   +8 more
core  

From All-Si Nanowire TFETs Towards III-V TFETs

, 2012
Performance improvement by device scaling has been the prevailing method in the semiconductor industry over the past four decades. However, current silicon transistor technology is approaching a fundamental limit where scaling does not improve device performance.
openaire   +1 more source