Results 1 to 10 of about 3,473 (197)
A Size, Weight, Power, and Cost-Efficient 32-Channel Time to Digital Converter Using a Novel Wave Union Method [PDF]
Sensors, 2023 We present a Tapped Delay Line (TDL)-based Time to Digital Converter (TDC) using Wave Union type A (WU-A) architecture for applications that require high-precision time interval measurements with low size, weight, power, and cost (SWaP-C) requirements ...
Saleh M. Alshahry +3 more
doaj +3 more sources
Firmware-only implementation of time-to-digital converter (TDC) in field-programmable gate array (FPGA) [PDF]
2003 IEEE Nuclear Science Symposium. Conference Record (IEEE Cat. No.03CH37515), 2003 A Time-to-Digital Converter (TDC) implemented in general purpose field-programmable gate array, (FPGA) for the Fermilab CKM experiment will be presented. The TDC uses a delay chain and register array structure to produce lower bits in addition to higher bits from a clock counter.
Wu, Jinyuan, Shi, Zonghan, Wang, Irena Y
openaire +2 more sources
PLI-TDC: Super Fine Delay-Time Based Physical-Layer Identification with Time-to-Digital Converter for In-Vehicle Networks [PDF]
Proceedings of the 2021 ACM Asia Conference on Computer and Communications Security, 2021 Recently, cyberattacks on Controller Area Network (CAN) which is one of the automotive networks are becoming a severe problem. CAN is a protocol for communicating among Electronic Control Units (ECUs) and it is a de-facto standard of automotive networks.
Shuji Ohira +3 more
openaire +2 more sources
62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA
Journal of King Saud University: Engineering Sciences, 2022 A 13-bit Time to Digital Converter is implemented using multiphase clock technique. Xilinx’s Virtex 5 FPGA platform is used to realize the TDC architecture.
Mahantesh Mattada, Hansraj Guhilot
doaj +2 more sources
IEEE Journal of Solid-State Circuits, 2009 This paper describes a time-to-digital converter (TDC) with ~1.2 ps resolution and ~327 mus dynamic range suitable for laser range-finding application for example. The resolution of ~1.2 ps is achieved with interpolation based on a cyclic time domain successive approximation (CTDSA) method that resolves the time difference between two non-repetitive ...
Rahkonen Timo +2 more
openaire +2 more sources
Arrayable TDC with Voltage-Controlled Ring Oscillator for dToF Image Sensors [PDF]
SensorsAs the resolution and conversion speed of time-to-digital conversion (TDC) chips continue to improve, the bit error rate also increases, leading to a decrease in the linearity of TDC and seriously affecting measurement accuracy.
Liying Chen +2 more
doaj +2 more sources
Sensors, 2022 Time-to-digital converter (TDC) is the key technology to realize accurate time delay measurement in high-precision optical fiber time-frequency transmission and synchronization, optical sensing and many scientific applications.
Xiangyu Mao +5 more
doaj +2 more sources
A 96-channel FPGA-based Time-to-Digital Converter (TDC) and fast trigger processor module with multi-hit capability and pipeline [PDF]
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2005 Abstract We describe an field-programmable gate arrays based (FPGA), 96-channel, Time-to-Digital converter (TDC) and trigger logic board intended for use with the Central Outer Tracker (COT) [T. Affolder et al., Nucl. Instr. and Meth. A 526 (2004) 249] in the CDF Experiment [The CDF-II detector is described in the CDF Technical Design Report (TDR ...
Mircea Bogdan +10 more
openaire +3 more sources
A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA on the GANDALF module
Journal of Instrumentation, 2012 The GANDALF 6U-VME64x/VXS module has been developed for the digitization and real time analysis of detector signals. To perform different applications such as analog-to-digital or time-to-digital conversions, coincidence matrix formation, fast pattern recognition and trigger generation, this module comes with exchangeable analog and digital mezzanine ...
Büchele, Maximilian +6 more
openaire +3 more sources
A Scalable Sub-Picosecond TDC Based on Analog Sampling of Dual-Phase Signals from a Free-Running Oscillator [PDF]
SensorsThis work presents a novel time-to-digital converter based on the analog sampling of dual-phase periodic signals generated from a free-running oscillator.
Roberto Cardella +9 more
doaj +2 more sources