Results 101 to 110 of about 1,742 (210)
A multichannel and compact time to digital converter for time of flight positron emission tomography [PDF]
This paper presents a novel multichannel time to digital converter (TDC) specifically designed for the digitization of photon time of flight (TOF) and energy in positron emission tomography (PET) scanners.
Roberto Roncella +13 more
core +1 more source
A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC
This paper presents the design of a 9-bit, Two-Step Time-to-Digital Converter (TDC) in 65 nm CMOS for the application in a time-mode ADC. The proposed TDC uses body-biasing in the fine TDC to obtain the resolution of the entire TDC, which is simulated to
Siek, Liter +7 more
core +1 more source
Low Resource FPGA Based Time-to-Digital Converter
For the precise measurement of the time difference between the arrival of different signals coming from the different channels, the time-to-digital converter (TDC) implemented in Field Programmable Gate Array (FPGA) is a very useful device.
Basab B. Purkayastha, Kaustubh Bhattacharyya, Ragib Nasir Ahmed, Sabyasachi Bhattacharyya,
core
Design of time-to-digital converter and chip applications
Time-to-digital converter (TDC) is very important in products which need precise time meaurement, compact size and low power consumption. In this thesis, a 8-stages GRO (Gated Ring Oscillator) TDC with high resolution and high linearity is presented ...
Xiong, Weihao
core
Crono TDC : diseño e implementación de un Time to Digital Converter en FPGA.
Proyecto Final IntegradorEn este trabajo se presenta el proyecto Crono TDC, el cual consiste en el diseño, implementación y validación de un Time to Digital Converter (TDC) con la capacidad de medir eventos de hasta 5 ns.
Rodríguez, Julián Nicolás
core
In recent years, Compute-in-memory (CiM) architectures have emerged as a promising solution for deep neural network (NN) accelerators. Multiply-accumulate~(MAC) is considered a {\textit de facto} unit operation in NNs. By leveraging the inherent parallel processing capabilities of CiM, NNs that require numerous MAC operations can be executed more ...
Challagundla, Dhandeep +2 more
openaire +2 more sources
We present a low-power Time-to-Digital Converter (TDC) chip, fabricated in a standard cost-effective 0.35 μm CMOS technology, which provides 160 ns dynamic range, 10 ps timing resolution and Differential Non-Linearity better than 0.01 LSB rms.
TAMBORINI, DAVIDE +13 more
core +1 more source
Radiation Assessment of a 15.6ps Single-Shot Time-to-Digital Converter in Terms of TID
© 2019 by the authors. Licensee MDPI, Basel, Switzerland. This article presents a radiation tolerant single-shot time-to-digital converter (TDC) with a resolution of 15.6 ps, fabricated in a 65 nm complementary metal oxide semiconductor (CMOS) technology.
Prinzie, Jeffrey +5 more
core +1 more source
Dual-Mode FPGA-Based Triple-TDC With Real-Time Calibration and a Triple Modular Redundancy Scheme
This paper proposes a triple time-to-digital converter (TDC) for a field-programmable gate array (FPGA) platform with dual operation modes. First, the proposed triple-TDC employs the real-time calibration circuit followed by the traditional tapped delay ...
Yuan-Ho Chen
core +1 more source
本篇論文研究之主要目的,在於時間至數位轉換器(Time-to-Digital Converter, TDC),又可以稱為時距數位化電路(Time Digitizer)的研製,其主要的功能係量測單擊信號(Single-Shot)波形脈寬或是起始/停止(Start/Stop)信號之間的時距,前述的單擊信號亦可將其上升以及下降邊緣視為起始與停止信號處理,其他相關同一般類比至數位轉換器(Analog-to-Digital Converter, ADC)的定義。近年來由於延遲鎖定迴路(Delay Locked ...
Sung, Chih-Wei, 宋之維
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