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Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application

2011 IEEE Recent Advances in Intelligent Computational Systems, 2011
We present an area efficient Time to Digital Converter (TDC) yielding a high resolution of nearly 10ps. The TDC architecture reported in this paper comprises of coarse measurement using system clock and two controllable oscillators for fine resolution measurement.
Mahantesh P Mattad   +2 more
openaire   +1 more source

TDC-CiM: Time-to-Digital Converter-Based Resonant Compute-in-Memory for INT8 CNNs With Layer-Optimized SRAM Mapping

IEEE Journal on Emerging and Selected Topics in Circuits and Systems
In recent years, Compute-in-memory (CiM) architectures have emerged as a promising solution for deep neural network (NN) accelerators. Multiply-accumulate (MAC) is considered a de facto unit operation in NNs. By leveraging the inherent parallel processing capabilities of CiM, NNs that require numerous MAC operations can be executed more efficiently ...
Dhandeep Challagundla   +2 more
openaire   +2 more sources

Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC

2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI), 2022
Rodrigo N. Wuerdig   +3 more
openaire   +2 more sources

A Novel Flash-Type Time-To-Digital Converters (TDC) Using GDI Technique

2022
Jakka Yeshwanth Reddy   +4 more
openaire   +1 more source

Multi-phase sampling time-to-digital converter (TDC) for jitter measurement

2021
RAMARAJU RAVINDRARAJ   +3 more
openaire   +1 more source

Time-to-digital converter (TDC) to operate with input clock signals with jitter

2023
PALLA NANDAKISHORE   +5 more
openaire   +1 more source

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