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Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC
2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI), 2022Rodrigo N. Wuerdig +3 more
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Review on the Evolution of Low-power and Highly-linear Time-to-Digital Converters - TDC
2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 2020Time-to-digital converters (TDC) have been widely used in all-digital phase-locked loops (ADPLL). However, the TDC non-linearity and resolution have negatively impacted the ADPLL performance. A better integration between the TDC and ADPLL would improve the performance of the ADPLL, with a minimum increase in power consumption.
Lesley Ferreira +5 more
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Two-Dimensions Vernier Time-to-Digital Converter
A two-dimensions Vernier algorithm applied to a time to digital converter (TDC) is presented. The solution proposed minimizes the length of the delay lines used to perform the digital conversion leading to a better efficiency compared to traditional ...
Antonio Liscidini, R Castello
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Quantization noise improvement of Time to Digital converter (TDC) for ADPLL
2009 IEEE International Symposium on Circuits and Systems, 2009A number of communication applications are moving to digitally motivated architectures for their radio frequency module. This includes GSM-EDGE, WLAN, Bluetooth, GSM-GPRS, WiMAX. The All Digital PLL(ADPLL) forms the core of this architecture. The objective of the ADPLL is to generate a clean carrier frequency ƒ c , based on a input reference frequency ...
Jawaharlal Tangudu +8 more
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Time-to-digital converter (TDC) for WiMAX ADPLL in 40-nm CMOS
2011 20th European Conference on Circuit Theory and Design (ECCTD), 2011WiMAX (Worldwide Inter-operability for Microwave Access) is an emerging wireless technology standard, which enables high-speed packet data access. To anticipate future demands of WiMAX technology, we propose an all-digital phase-locked loop (ADPLL) based frequency synthesizer for the WiMAX RF transceiver.
Popong Effendrik +4 more
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A synthesizable Time to Digital Converter (TDC) with MIMO spatial oversampling method
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), 2015A 7 ps/LSB, 0.02 mm2 and 3.9 mW@50MHz Time to Digital Converter architecture with novel MIMO spatial oversampling method is proposed as part of an effort to implement an all-digital PLL (ADPLL) by replacing the phase frequency detector in phase locked loops (PLL).
Yalçin Balcioglu, Günhan Dündar
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Time-to-digital converter (TDC) based on startable ring oscillators and successive approximation
2014 NORCHIP, 2014This paper presents a time-to-digital converter (TDC) architecture based on startable ring oscillators (SRO) and the cyclic time domain successive approximation principle. A ring oscillator is first used as a coarse interpolator within the cycle of the reference clock, after which the ring oscillator is used as a phase memory for the time domain ...
Antti Mäntyniemi, Juha Kostamovaara
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2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017
Based on the parallel DTCs as delay cells, a 4-bit TDC with adjustable 0.7ps∼1.4ps resolution and 11ps∼22ps dynamic range is proposed in this paper. In this design, an extremely high resolution DTC is presented, achieving 15.6fs delay per LSB. By utilizing 16 DTCs which are adjusted to have the same time interval among two neighboring DTCs, a highly ...
Tingbing Ouyang +4 more
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Based on the parallel DTCs as delay cells, a 4-bit TDC with adjustable 0.7ps∼1.4ps resolution and 11ps∼22ps dynamic range is proposed in this paper. In this design, an extremely high resolution DTC is presented, achieving 15.6fs delay per LSB. By utilizing 16 DTCs which are adjusted to have the same time interval among two neighboring DTCs, a highly ...
Tingbing Ouyang +4 more
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High resolution distributed time-to-digital converter (TDC) in a White Rabbit network
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2014Abstract The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km2 areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray ...
Weibin Pan +4 more
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Design and Experiment of Ultrasonic Anemometer Using TDC-GP2 Time-to-Digital Converter
Key Engineering Materials, 2014An ultrasonic anemometer using TDC-GP2 high-accuracy time measuring chip is studied in this paper, the design of software and hardware parts and principle of flying time measurement using TDC-GP2 chip are also discussed in detail. Under this scheme, a prototype has been fabricated, with simpler circuit architecture.
Han Yu Du, Ming Qin
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