Results 71 to 80 of about 117,069,527 (207)
Subthreshold Time‐Mode All‐Digital DLL With Built‐In Linearization
International Journal of Circuit Theory and Applications, Volume 54, Issue 10, Page 5045-5061, October 2026.This paper presents a subthreshold time‐mode all‐digital delay‐locked loop (DLL) for low‐frequency clock generation. The large and tunable delay of the DLL is obtained using a static inverter delay line whose supply voltage is in the vicinity of 100 mV and adjustable by varying supply voltage. Phase error is processed by a time‐mode proportional block (
Fei Yuan, Wenhao Wu, Yushi Zhou
wiley +1 more source
Integrated High-Resolution Multi-Channel Time-to-Digital Converters (TDCs) for PET Imaging
, 2011 None
Wu Gao +3 more
openaire +3 more sources
Phase–frequency detecting time-to-digital converter
A simple time-to-digital converter (TDC), capable of detecting not only phase difference but also frequency difference, is presented. The proposed TDC guarantees pull-in even for PLLs with the lowest loop gain.
Oh, D.-H., Choo, K.-J., Jeong, D.-K.
core +1 more source
First Order Shaping Local-Oscillator Based Time-to-Digital Converter
, 2010 This paper presents a First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter (LO TDC). The architecture and governing equations of the LO TDC are described.
M. P. Kennedy +7 more
core +1 more source
Achievement of Transition Metal Chalcogenides/Oxides in Hydrogen Production by Seawater Electrolysis
EcoEnergy, Volume 4, Issue 5, October 2026.Transition metal chalcogenides (TMCs)/oxides have shown great application potential in seawater splitting for hydrogen generation due to their adjustable electronic properties, abundant active sites, and excellent catalytic performance. ABSTRACT Under the impetus of global “dual carbon” goals, green hydrogen has become a key component of the future ...
Xiaohui Du, Xinyu Li, Jianna Li, Tao Sun
wiley +1 more source
A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC
, 2016 This paper presents the design of a 9-bit, Two-Step Time-to-Digital Converter (TDC) in 65 nm CMOS for the application in a time-mode ADC. The proposed TDC uses body-biasing in the fine TDC to obtain the resolution of the entire TDC, which is simulated to
Siek, Liter +8 more
core +1 more source
EcoEnergy, Volume 4, Issue 5, October 2026.This review highlights emerging integrated energy systems based on perovskite photovoltaics, including PSC–thermoelectric, photovoltaic–electrochemical, self‐charging, and building‐integrated architectures. By coupling multiple energy conversion and storage pathways, these multifunctional platforms enable enhanced solar utilization, improved stability,
Yihuai Huang +10 more
wiley +1 more source
Neuropathic Pain: From Mechanisms to Therapeutic Interventions
MedComm, Volume 7, Issue 10, October 2026.Neuropathic pain arises from peripheral nerve injury, central sensitization, neurotransmitter imbalance, neuroimmune activation, and maladaptive circuit remodeling. Clinical phenotyping and multimodal imaging can identify dominant peripheral and central mechanisms.
Yaling Dai +8 more
wiley +1 more source
Semidigital PLL Design for Low-Cost Low-Power Clock Generation
Journal of Electrical and Computer Engineering, 2011 This paper describes recent semidigital architectures of the phase-locked loop (PLL) systems for low-cost low-power clock generation. With the absence of the time-to-digital converter (TDC), the semi-digital PLL (SDPLL) enables low-power linear phase ...
Ni Xu, Woogeun Rhee, Zhihua Wang
doaj +1 more source
Mokslas: Lietuvos Ateitis, 2017 Time to digital converter (TDC) is one of the main blocks of all-digital frequency synthesizer (FS), where it is used as phase detector. The output of TDC is digital, therefore it introduces quantization noise to the output of FS.
Marijan Jurgo, Romualdas Navickas
doaj +1 more source