Per-pixel time-to-digital converter (TDC) architectures have been exploited by single-photon avalanche diode (SPAD) sensors to achieve high photon throughput, but at the expense of fill factor, pixel pitch and readout efficiency. In contrast, TDC sharing
Chao Zhang +4 more
doaj +1 more source
A Background Jitter Calibration for ADCs Using TDC Phase Information From ADPLL
The phase noise, commonly known as jitter, in Phase-Locked Loops (PLLs) is conventionally perceived as a stochastic process, necessitating a degree of tolerance in downstream circuits such as Analog-to-Digital Converters (ADCs). This paper addresses this
Haoyang Shen +4 more
doaj +1 more source
High-Performance Time-to-Digital Conversion on a 16-nm Ultrascale+ FPGA
In recent years, field-programmable gate arrays (FPGAs) have emerged as promising platforms for implementing picosecond-resolution time-to-digital converters (TDCs).
Lorenzo Castelvero +2 more
doaj +1 more source
A New Successive Time Balancing Time-to-Digital Conversion Method. [PDF]
Jurasz K +3 more
europepmc +1 more source
Super-dense point clouds acquired by an ultralight 10 g solid-state single photon LiDAR. [PDF]
Ohno T +4 more
europepmc +1 more source
Analog Front-End ASIC for Compact Silicon Photomultiplier Sensor Interfaces in Mixed-Signal Systems. [PDF]
Badoni D +7 more
europepmc +1 more source
Cross-Detection for Bubble-free Thermometer Codes and Dual-Side Monitoring for FPGA-Based High-Accuracy and High-Precision Time-to-Digital Converters. [PDF]
Lee D, Yi M, Kwon SI.
europepmc +1 more source
Methodology for Testing Key Parameters of Array-Level Small-Area Hafnium-Based Ferroelectric Capacitors Using Time-to-Digital Converter and Capacitance Calibration Circuits. [PDF]
Zhang D +8 more
europepmc +1 more source
Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA. [PDF]
Chen R, Chen P, Li K, Liu H.
europepmc +1 more source

