Results 21 to 30 of about 197,559 (299)
Bio-inspired 0.35μm CMOS Time-to-Digital Converter with 29.3ps LSB [PDF]
, 2006 Time-to-digital converter (TDC) integrated circuit is introduced in this paper. It is based on chain of delay elements composing a regular scalable structure. The scheme is analogous to the sound direction sensitivity nerve system found in barn owl.
Chung, Jen-Feng +3 more
core +1 more source
A Coarse-Fine Time-to-Digital Converter
ITM Web of Conferences, 2017 A design of time-to-digital converter (TDC) using a coarse-fine conversion scheme is presented. The coarse stage was accomplished by a delay line, and used a loop counter at the end of the delay line to achieve wide dynamic range. The fine stage utilized
Chen Ya-Qian, Meng Li-Ya, Lin Xiao-Gang
doaj +1 more source
Impedance Characteristics and Harmonic Analysis of LCL-Type Grid-Connected Converter Cluster
Energies, 2022 This study addresses the output impedance model of the LCL-type grid-connected converter considering the dead-time effects and the digital control delay.
Xiaojie Zhou, Dezhi Xu, Yourui Huang
doaj +1 more source
The Modern FPGA as Discriminator, TDC and ADC [PDF]
, 2006 Recent generations of Field Programmable Gate Arrays (FPGAs) have become indispensible tools for complex state machine control and signal processing, and now routinely incorporate CPU cores to allow execution of user software code.
+10 more
core +2 more sources
All-Digital Background Calibration Technique for Offset, Gain and Timing Mismatches in Time-Interleaved ADCs [PDF]
EAI Endorsed Transactions on Industrial Networks and Intelligent Systems, 2019 This paper presents a method for all-digital background calibration of multiple channel mismatches including offset, gain and timing mismatches in time-interleaved analog to digital converters (TIADCs).
Van-Thanh Ta +2 more
doaj +1 more source
Continuous‐time digital filtering analogue‐to‐digital converter
Electronics Letters, 2016 Despite their alias‐free operation, continuous time ADCs can have their power consumption overwhelmed when presented out‐of‐band, high frequency, high amplitude signals. A new continuous time ADC architecture which, thanks to its embedded low‐pass filter transfer function is proposed, enables a power efficient quantisation in the presence of such ...
Ratiu, Alin +4 more
openaire +2 more sources
All-Digital Time-to-Digital Converter Design Methodology Based on Structured Data Paths
IEEE Access, 2019 Time-to-Digital Converters (TDC) are popular circuits in many applications, where high resolution time measurements are required, for example, in Positron Emission Tomography (PET).
Rui Machado +2 more
doaj +1 more source
Mokslas: Lietuvos Ateitis, 2018 In this paper, the model of 2D Vernier time to digital converter (TDC) based on gated ring oscillators, which is implemented using VHDL hardware description language, is presented.
Marijan Jurgo, Romualdas Navickas
doaj +1 more source
THE METHODOLOGY OF CIRCUIT CONSTRUCTION OF THE ANALOG VALUE CONVERTER IN THE TIMEFRAME
Измерение, мониторинг, управление, контроль, 2023 Background. Most modern digital voltmeters use an analog-to-digital converter (ADC) of the time-pulse type with two-stage integration, which takes place in two stages – integration and counting.
Mikhail A. Vatutin +3 more
doaj +1 more source
Energies, 2020 Most of the traditional PID tuning methods are heuristic in nature. The heuristic approach-based tuned PID controllers show only nominal performance.
Ghulam Abbas +9 more
doaj +1 more source