Results 111 to 120 of about 5,733 (288)

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Phase dealy time and superluminal propagation in barrier tunneling [PDF]

, 2005
In this work we study the behaviour of Wigner phase delay time for tunneling in the reflection mode. Our system consists of a circular loop connected to a single wire of semi-infinite length in the presence of Aharonov-Bohm flux.
Jayannavar, A. M., Bandopadhyay, S.
core   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source

Analog Weight Update Rule in Ferroelectric Hafnia, Using picoJoule Programming Pulses

Advanced Electronic Materials, EarlyView.
Resistive, ferroelectric synaptic weights based on BEOL‐compatible hafnia/zirconia nanolaminates are fabricated. Lateral downscaling the devices below 10 µm2 enables 20 ns programming with electrical pulses, dissipating ≤ 3 pJ. Experimental results show that final conductance state is set by pulse amplitude, and is largely independent of the initial ...
Alexandre Baigol, Nikhil Garg, Matteo Mazza, Yanming Zhang, Elisa Zaccaria, Wooseok Choi, Bert Jan Offrein, Laura Bégon‐Lours   +7 more
wiley   +1 more source

Interference and dispersion effects on tunneling time

, 2006
We study the interplay between pulse width, interference and tunneling for a wave packet incident upon a barrier and, within the context of tunneling time, we offer a complementary insight into the origin of the Hartman effect.
J. C. Martinez, M. Taufik, E. Polatdemir
core   +1 more source

A Dual‐Memory Ferroelectric Transistor Emulating Synaptic Metaplasticity for High‐Speed Reservoir Computing

Advanced Electronic Materials, EarlyView.
A CMOS‐compatible ferroelectric transistor harnesses the interplay between stable gate polarization memory and volatile non‐quasi‐static channel charge dynamics to emulate how biological synapses regulate their own plasticity. This brain‐inspired dual‐memory mechanism, realized in a single device, enables a physical reservoir computer that solves ...
Yifan Wang, Muhammad Sakib Shahriar, Salma Soliman, Noah Vaillancourt, Lance Fernandes, Andrea Padovani, Asif Islam Khan, Md Sakib Hasan, Raisul Islam   +8 more
wiley   +1 more source

Silicon Nitride Resistive Memories

Advanced Electronic Materials, EarlyView.
Amorphous SiNx is an attractive resistance switching material for ReRAM applications due to its physicochemical properties, such as humidity resistance, low oxygen diffusivity, and is used as a metal diffusion blocker. By modifying the ratio between N and Si atoms, the microstructure of the SiNx is affected, rendering it possible to change the ...
Alexandros‐Eleftherios Mavropoulis, Nikolaos Vasileiadis, Iosif‐Angelos Fyrigos, Emmanouil Stavroulakis, Caroline Bonafos, Pascal Normand, Georgios Ch. Sirakoulis, Panagiotis Dimitrakis   +7 more
wiley   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

Advanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez, Niladri Bhattacharjee, Yuxuan He, Giulio Galderisi, Brojogopal Sapui, Sara Mannaa, Ian O'Connor, Violetta Sessi, Peter Javorka, Thomas Mikolajick, Jens Trommer   +10 more
wiley   +1 more source

Intrinsic and Extrinsic Effects on Performance Limitation of AlGaAs/GaAs Double-barrier Resonant Tunneling Structures

, 2012
[[abstract]]The performance limitations of negative differential resistance (NDR) in AlGaAs/GaAs double-barrier resonant tunneling structures (DBRTSs) have been investigated by varying the barrier thickness and quantum well (QW) width, and by doping In ...
Wu, Jenq-Shinn; Lee, C. P. ; Chang, C. Y. ; Chang, K. H. ; Liu, D. G. ; Liou, D. C.
core  

Physics‐Based Compact Modeling of Advanced 3D Nanoscale Vertical NAND Flash Memory

Advanced Electronic Materials, EarlyView.
For advanced 3D NAND flash memory, a unified compact model for SPICE is proposed that spans from the intrinsic unit cell to the full string and captures the electrostatic coupling with adjacent inhibit strings. It can successfully predict read behavior, program/erase dynamics, and interactions between neighboring cells, reflecting array‐level behavior ...
Ilho Myeong, Seonho Shin, Ickhyun Song
wiley   +1 more source