Results 21 to 30 of about 8,846,054 (209)
IEEE Journal of the Electron Devices Society, 2021 For triple-level or quad-level 3D NAND flash memory, narrowing the Vth distribution of each state without influencing page program performance is one of the challenges.
Zhichao Du +6 more
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Sensors, 2023 Three-dimensional NAND flash memory is widely used in sensor systems as an advanced storage medium that ensures system stability through fast data access. However, in flash memory, as the number of cell bits increases and the process pitch keeps scaling,
Hanshui Fan +6 more
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Effect of Noncircular Channel on Distribution of Threshold Voltage in 3D NAND Flash Memory
Micromachines, 2023 The instability in threshold voltage (VTH) and charge distributions in noncircular cells of three-dimensional (3D) NAND flash memory are investigated.
Donghyun Go +6 more
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Match‐line control unit for power and delay reduction in hybrid CAM
IET Circuits, Devices and Systems, 2021 Content addressable memory (CAM) is a hardware search engine utilised for accelerating translation and table look‐up in network routers and data processing systems.
Sheikh Wasmir Hussain +3 more
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Investigation of Poly Silicon Channel Variation in Vertical 3D NAND Flash Memory
IEEE Access, 2022 Since the most of three dimensional (3D) NAND devices’ channel is composed of polysilicon grain, the actual 3D NAND channel has a wave-shaped channel, not uniform shape.
Inyoung Lee +3 more
doaj +1 more source
Low-voltage solution-processed Cuprous thiocyanate Thin-Film transistors with NAND logic function
Results in Physics, 2023 Coprous thiocyanate (CuSCN)-based thin-film transistors (TFTs) by solution-processed chitosan electrolyte are fabricated on glass substrates. Such TFTs show a low operation voltage of −2.0 V due to the large specific gate capacitance of 7.65 μF/cm2 ...
Liuhui Lei +7 more
doaj +1 more source
Robust mean absolute deviation problems on networks with linear vertex weights [PDF]
, 2013 This article deals with incorporating the mean absolute deviation objective function in several robust single facility location models on networks with dynamic evolution of node weights, which are modeled by means of linear functions of a parameter ...
López de los Mozos Martín, María Cruz +2 more
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Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory
IEEE Access, 2021 In charge-trap (CT) three-dimensional (3D) NAND flash memory, the transition layer between Si3N4 CT layer and SiO2 tunneling layer is inevitable, and the defects in the transition layer are expected to cause both lateral and vertical charge loss.
Fei Wang +3 more
doaj +1 more source
Engineering Science and Technology, an International Journal, 2023 We present a behavioral compact model and its implementation for low-voltage pentacene-based organic thin film transistors (OTFTs) using industry standard BSIM4 (Berkeley Short-channel IGFET Model) in LTspice platform.
Nihat Akkan, Mustafa Altun, Herman Sedef
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IEEE Access, 2013 A 256 Gb NAND flash memory multi-chip package (MCP) includes eight stacked 32 Gb 2 bit/cell multi-level cell (MLC) die and an 11.6 mm2 HyperLink NAND bridge chip providing four internal NAND channels for concurrent memory operations.
Peter Gillingham +7 more
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