Results 71 to 80 of about 8,846,054 (209)

Reconfigurable Combinational Logic Operations Using Triple‐Gated Feedback Field‐Effect Transistors for Logic‐In‐Memory Computing

Advanced Electronic Materials, EarlyView.
In this study, we demonstrated that four distinct combinational logic operations can be reconfigured and executed within a single circuit structure, where each reconfigurable logic‐in‐memory cell dynamically adapts its function. The reconfigurable logic‐in‐memory cell, composed of triple‐gated feedback field‐effect transistors, performs NOT, AND, OR ...
Dongki Kim, Yunwoo Shin, Hyojoo Heo, Kyoungah Cho, Sangsig Kim   +4 more
wiley   +1 more source

Atomic Layer-Deposited HfAlOx-Based RRAM with Low Operating Voltage for Computing In-Memory Applications

Nanoscale Research Letters, 2019
With Moore’s law closing to its physical limit, traditional von Neumann architecture is facing a challenge. It is expected that the computing in-memory architecture-based resistive random access memory (RRAM) could be a potential candidate to overcome ...
Zhen-Yu He, Tian-Yu Wang, Lin Chen, Hao Zhu, Qing-Qing Sun, Shi-Jin Ding, David Wei Zhang   +6 more
doaj   +1 more source

Toward Reliable Metal Halide Perovskite FETs: From Electronic Structure and Device Physics to Stability and Performance Engineering

Advanced Electronic Materials, EarlyView.
Metal halide perovskite field‐effect transistors (PeFETs) offer great promise for flexible, low‐cost, and high‐performance due to their excellent charge carrier properties. However, challenges like ion migration, hysteresis, and instability limit their performance.
Georgios Chatzigiannakis, Anastasia Soultati, Leonidas C. Palilis, Ermioni Polydorou, Konstantinos Davazoglou, Petros‐Panagis Filippatos, Goutham Raj Perumallapelli, Ravindra Naik Bukke, Abd. Rashid bin Mohd Yusoff, Ilhwan Ryu, Peng Gao, Alexander Chroneos, Mohammad Khaja Nazeeruddin, Maria Vasilopoulou   +13 more
wiley   +1 more source

Analog Low-Voltage Current-Mode Implementation of Digital Logic Gates

Active and Passive Electronic Components, 2003
In this letter a new technique is introduced for implementing the basic logic functions using analog current-mode techniques. By expanding the logic functions in power series expressions, and using summers and multipliers, realization of the basic logic ...
Muhammad Taher Abuelma'atti
doaj   +1 more source

Variable-range hopping conductivity of La₁₋xSrxMn₁₋yFeyO₃ [PDF]

, 2011
The temperature dependence of the resistivity,ρ, of ceramic of La₁₋xSrxMn₁₋yFeyO₃ (LSMFO) samples with x=0.3 and y=0.03, 0.15, 0.20 and 0.25 (or simply #03, #15, #20 and #25, respectively) is investigated between temperaturesT∼5 and 310 K in magnetic ...
Laiho, R., Lashkul, A. V., Zakhvalinskii, V. S.   +2 more
core   +1 more source

Materials Design Principles for Large Memory Windows: Coercive Voltage Engineering in Ferroelectric– Dielectric Heterostructures

Advanced Electronic Materials, EarlyView.
Coercive voltage enhancement in hafnia‐based ferroelectric–dielectric heterostructures is shown to originate from leakage‐governed voltage division between the ferroelectric and dielectric layers. Through experiments, circuit modeling, and defect‐based simulations, a universal framework is established to engineer large memory windows without altering ...
Prasanna Venkatesan, Hari Jayasankar, Salma Soliman, Priyankka Ravikumar, Lance Fernandes, Chinsung Park, Amrit Garlapati, Chengyang Zhang, Sanghyun Kang, Shimeng Yu, Suman Datta, Asif Khan, Mengkun Tian, Zheng Wang, Kijoon Kim, Kwangyou Seo, Kwangsoo Kim, Wanki Kim, Daewon Ha, Luca Larcher, Gaurav Thareja, Andrea Padovani   +21 more
wiley   +1 more source

A String-Select-Line Separation Patterning Scheme for Low Voltage and High-Speed Program Operation in 3D NAND Flash Memory With Separated Source-Line

IEEE Access
In this paper, we propose a novel String-Select-Line Separation Patterning (SSP) scheme designed for low voltage and high-speed program operation in 3D NAND flash memory structures with a separated Source-Line (SL).
Jae-Min Sim, Hakyeong Kim, Yun-Heub Song
doaj   +1 more source

Building Reliable Massive Capacity SSDs through a Flash Aware RAID-Like Protection

Applied Sciences, 2020
The demand for mass storage devices has become an inevitable consequence of the explosive increase in data volume. The three-dimensional (3D) vertical NAND (V-NAND) and quad-level cell (QLC) technologies rapidly accelerate the capacity increase of flash ...
Jaeho Kim, Jung Kyu Park
doaj   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source

Implementing Logic Functions Using Independently-Controlled Gate in Double-Gate Tunnel FETs: Investigation and Analysis

IEEE Access, 2019
Recently, a compact realization of logic gates using double-gate tunnel field effect transistors (DGTFETs) with independently-controlled gate has been proposed.
Shelly Garg, Sneh Saurabh
doaj   +1 more source