Results 31 to 40 of about 5,102 (147)

uFLIP-OC: Understanding Flash I/O Patterns on Open-Channel Solid State Drives [PDF]

open access: yes, 2017
International audienceSolid-State Drives (SSDs) have gained acceptance by providing the same block device abstraction as magnetic hard drives, at the cost of suboptimal resource utilisation and unpredictable performance.
Bjørling Matias   +5 more
core   +3 more sources

Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory

open access: yesIEEE Access, 2021
In charge-trap (CT) three-dimensional (3D) NAND flash memory, the transition layer between Si3N4 CT layer and SiO2 tunneling layer is inevitable, and the defects in the transition layer are expected to cause both lateral and vertical charge loss.
Fei Wang   +3 more
doaj   +1 more source

3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer

open access: yesIEEE Access, 2023
To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh   +4 more
doaj   +1 more source

Analysis of High-Temperature Data Retention in 3D Floating-Gate nand Flash Memory Arrays

open access: yesIEEE Journal of the Electron Devices Society, 2023
In this paper, we present a detailed experimental investigation of high-temperature data retention in 3D floating-gate NAND Flash memory arrays. Data reveal that charge detrapping from the cell tunnel oxide and depassivation of traps in the string ...
Gerardo Malavena   +4 more
doaj   +1 more source

Analysis of HBM Failure in 3D NAND Flash Memory

open access: yesElectronics, 2022
Electrostatic discharge (ESD) events are the main factors impacting the reliability of NAND Flash memory. The behavior of human body model (HBM) failure and the corresponding physical mechanism of 3D NAND Flash memory are investigated in this paper. A catastrophic burn-out failure during HBM zapping is first presented. Analysis shows that NMOS fingers’
Biruo Song   +6 more
openaire   +1 more source

Adaptive Bitline Voltage Countermeasure for Neighbor Wordline Interference in 3D NAND Flash Memory-Based Sensors

open access: yesSensors, 2023
Three-dimensional NAND flash memory is widely used in sensor systems as an advanced storage medium that ensures system stability through fast data access. However, in flash memory, as the number of cell bits increases and the process pitch keeps scaling,
Hanshui Fan   +6 more
doaj   +1 more source

DESTINY: A Comprehensive Tool with 3D and Multi-Level Cell Memory Modeling Capability [PDF]

open access: yes, 2017
To enable the design of large capacity memory structures, novel memory technologies such as non-volatile memory (NVM) and novel fabrication approaches, e.g., 3D stacking and multi-level cell (MLC) design have been explored.
Mittal, Sparsh   +2 more
core   +3 more sources

Activation Enhancement and Grain Size Improvement for Poly-Si Channel Vertical Transistor by Laser Thermal Annealing in 3D NAND Flash

open access: yesMicromachines, 2023
The bit density is generally increased by stacking more layers in 3D NAND Flash. Lowering dopant activation of select transistors results from complex integrated processes.
Tao Yang   +8 more
doaj   +1 more source

Coding scheme for 3D vertical flash memory

open access: yes, 2015
Recently introduced 3D vertical flash memory is expected to be a disruptive technology since it overcomes scaling challenges of conventional 2D planar flash memory by stacking up cells in the vertical direction.
Bandic, Zvonimir   +4 more
core   +1 more source

Effect of Noncircular Channel on Distribution of Threshold Voltage in 3D NAND Flash Memory

open access: yesMicromachines, 2023
The instability in threshold voltage (VTH) and charge distributions in noncircular cells of three-dimensional (3D) NAND flash memory are investigated.
Donghyun Go   +6 more
doaj   +1 more source

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