Results 61 to 70 of about 360 (132)
Advanced Electronic Materials, Volume 12, Issue 2, 21 January 2026.A compact neuromorphic synapse is presented, coupling anti‐ferroelectric capacitors with carbon nanotube devices to realize a non‐volatile, ternary STDP learning circuit. A calibrated compact model employs the negative differential resistance effect for ternary latching in a non‐volatile fashion.
Mohammad Khaleqi Qaleh Jooq +4 more
wiley +1 more source
IET Circuits, Devices &Systems, Volume 2026, Issue 1, 2026.This paper presents a novel architecture the diagonal tunneling dielectrically modulated tunnel field effect transistor (DT‐DMTFET) for label‐free biosensing applications. The study employs TCAD (Silvaco TCAD) simulations to comprehensively analyze the behavior of the DT‐DMTFET biosensor focusing on key parameters such as drain current, sub‐threshold ...
I. Rama Satya Nageswara Rao +2 more
wiley +1 more source
Dopingless 1T DRAM: Proposal, Design, and Analysis
IEEE Access, 2019 In this paper, we have proposed a dopingless 1T DRAM (DL-DRAM) that utilizes the charge plasma concept. The proposed device employs a misaligned double-gate architecture to store holes and differentiates between the two logic states.
Akhil James, Sneh Saurabh
doaj +1 more source
Tunable Doping Enabled by Dielectric Screening Layer in Carbon Nanotube Transistors
Advanced Electronic MaterialsDoping is a crucial technique for achieving high‐performance carbon nanotube (CNT) metal‐oxide‐semiconductor field‐effect transistors (MOSFETs). However, excessive doping in the extension region can induce significant band‐to‐band tunneling (BTBT ...
Chen‐Han Chou +7 more
doaj +1 more source
HamFET: A High-Performance Subthermionic Transistor Through Incorporating Hybrid Switching Mechanism
IEEE Journal on Exploratory Solid-State Computational Devices and CircuitsField-effect transistors (FETs) switched by quantum band-to-band tunneling (BTBT) mechanism, rather than conventional thermionic emission mechanism, are emerging as an exciting device candidate for future ultralow-power electronics due to their ...
Qianqian Huang, Shaodi Xu, Ru Huang
doaj +1 more source
Vertical-Stack Nanowire Structure of MOS Inverter and TFET Inverter in Low-Temperature Application
IEEE AccessTunneling Field-Effect Transistors (TFET) have emerged as promising candidates for integrated circuits beyond conventional metal-oxide-semiconductor field-effect transistors (MOSFET) and could overcome the physical limit, which results in the ...
Chi-Cheng Tien, Yu-Hsien Lin
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IEEE Journal of the Electron Devices SocietyIn this paper, we propose a low-power stack-level programming scheme for ultrahigh stack 3D NAND flash memory. As the number of word lines (WLs) increases beyond 300 layers, the increased pass voltage leads to excessive power consumption and reliability ...
Kyungmin Lee +3 more
doaj +1 more source
Surface-Potential-Based Drain Current Model of Gate-All-Around Tunneling FETs
IEEE Journal of the Electron Devices SocietyA closed-form, analytical, and unified model for the surface potential from source to drain in nanowire (NW) gate-all-around (GAA) tunneling field effect transistors (TFETs) is proposed and validated.
Zhanhang Chen +7 more
doaj +1 more source
Nanosheet integration of induced tunnel field-effect transistor with lower cost and lower power
Discover NanoNanosheet transistors are poised to become the preferred choice for the next generation of smaller-sized devices in the future. To address the future demand for high-performance and low-power computing applications, this study proposes a nanosheet ...
Jyi-Tsong Lin, Chia-Yo Kuo
doaj +1 more source
Reliability assessment of Z-shaped gate TFET under interface trap charges and thermal variations for low-power applications. [PDF]
Sci RepAshok T, Pandey CK.
europepmc +1 more source