Results 71 to 80 of about 1,100 (152)

Van der Waals heterojunctions with negative differential transconductance for broadband photodetection, multi‐valued logic, and artificial neuron

InfoMat, Volume 7, Issue 10, October 2025.
This work explores a combination of two ultra‐thin materials, indium selenide (InSe) and black phosphorus (BP), to create a highly efficient electronic device. This device exhibits negative differential transconductance (NDT), which is useful for developing low‐power, high‐speed logic circuits and neuromorphic (brain‐inspired) computing.
Muhammad Zubair, Yu Xu, Yangyang Wang, Xiaoyong Jiang, Jinshui Miao, Shenglan Hao, Bobo Tian, Junhao Chu, Chungang Duan   +8 more
wiley   +1 more source

Effects of the Channel Length on the Nanoscale Field Effect Diode Performance [PDF]

Journal of Optoelectronical Nanostructures, 2018
Field Effect Diode (FED)s are interesting device in providing the higherON-state current and lower OFF–state current in comparison with SOI-MOSFETstructures with similar dimensions. The impact of channel length and band-to-bandtunneling (BTBT) on the OFF-
arash rezaei, Bahram Azizollah-Ganji, Morteza Gholipour   +2 more
doaj  

Realizing XOR and XNOR Functions Using Tunnel Field-Effect Transistors

IEEE Journal of the Electron Devices Society, 2020
Recently, a few compact logic function realizations such as AND, OR, NAND and NOR have been proposed using double-gate tunnel field-effect transistor (DGTFET) with independent gate-control.
Shelly Garg, Sneh Saurabh
doaj   +1 more source

Device Physics and Architecture Advances in Tunnel Field‐Effect Transistors

Interdisciplinary Materials, Volume 4, Issue 5, Page 686-708, September 2025.
The key for performance breakthroughs in TFET, the most promising beyond‐CMOS transistor, lies in refining the optimal parameters in device physics to advance the material and architecture design. This review summarizes the key points, including electrostatic screening length λ, carrier effective mass m T *, interface‐trap density D it, etc., and ...
Zehan Wu, Yifei Zhao, Fumei Yang, Jianhua Hao   +3 more
wiley   +1 more source

SiGe-Surrounded Bitline Structure for Enhancing 3D NAND Flash Erase Speed

Applied Sciences
Three-dimensional NAND Flash has adopted the cell-over-peripheral (COP) structure to increase storage density. Unlike the conventional structure, the COP structure cannot directly increase the channel potential via substrate bias during the erase ...
Dohyun Kim, Wonbo Shim
doaj   +1 more source

Digital Logic and Asynchronous Datapath With Heterogeneous TFET-MOSFET Structure for Ultralow-Energy Electronics

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2020
The tunnel field-effect transistor (TFET) is a promising solution for high energy-efficient circuits. Based on the band-to-band tunneling (BTBT) condition, fast switching characteristic with a steep subthreshold swing (SS) in the ultralow-voltage ...
Jo-Han Hung, Pei-Yu Wang, Yu-Chen Lo, Chih-Wen Yang, Bing-Yue Tsui, Chia-Hsiang Yang   +5 more
doaj   +1 more source

Generalized phonon-assisted Zener tunneling in indirect semiconductors with non-uniform electric fields : a rigorous approach

, 2011
A general framework to calculate the Zener current in an indirect semiconductor with an externally applied potential is provided. Assuming a parabolic valence and conduction band dispersion, the semiconductor is in equilibrium in the presence of the ...
Abramowitz M., Bart Sorée, Keldysh L., Keldysh L., Kittel C., Massimo V. Fischetti, Olver F. W. J., William Vandenberghe, Wim Magnus   +8 more
core   +1 more source

1 Transistor‐Dynamic Random Access Memory as Synaptic Element for Online Learning

Advanced Intelligent Systems, Volume 7, Issue 8, August 2025.
This work demonstrates the feasibility of utilizing capacitor‐less 1 transistor(1 T)‐dynamic random access memory as synaptic element with multilevel capability, large dynamic range of conductance, high linearity, ultralow energy consumption, high endurance exceeding 1015 cycles, and large integration density for artificial‐intelligence‐of‐things edge ...
MD Yasir Bashir, Pritish Sharma, Shubham Sahay   +2 more
wiley   +1 more source

Room-temperature spin transport through band-to-band tunneling at semiconductor p-n junctions [PDF]

Oki K., Ueda S., Usami T., et al. Room-temperature spin transport through band-to-band tunneling at semiconductor p-n junctions. Physical Review Applied 23, L051005 (2025); https://doi.org/10.1103/physrevapplied.23.l051005.We report electrical spin ...
Fujii, S., Hamaya, K., Kikuoka, S., Oki, K., Sawano, K., Ueda, S., Usami, T., Yamamoto, K.   +7 more
core   +1 more source

Observation of 1/f 4 Noise in Organic Bilayer Ambipolar FETs and Proposition of Defect Engineering Method for Ultimate Noise Control

Advanced Electronic Materials, Volume 11, Issue 11, July 2025.
The low‐frequency noise in organic bilayer ambipolar transistors is investigated, revealing a unique 1/f⁴ noise from correlated trapping/detrapping and generation/recombination processes. Inserting a thin parylene layer between the n/p junction effectively reduces this excess noise, suggesting a practical approach to enhanced device reliability in ...
Youngmin Han, Jaechan Song, Ryun‐Han Koo, Hocheon Yoo, Wonjun Shin   +4 more
wiley   +1 more source