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Computational lithography and its role in nanoimprint lithography for semiconductor device manufacturing

Photomask Technology 2020, 2020
For nanoimprint lithography, computational technologies are still being developed. In this paper, we introduce a new NIL process simulator which simulates the whole imprinting process, and evaluates the quality of the resulting resist film. To overcome the scale difference of each component of the system, which makes it difficult to calculate the ...
Toshiya Asano   +2 more
exaly   +2 more sources

Computational lithography: Exhausting the resolution limits of 193-nm projection lithography systems

Journal of Vacuum Science and Technology B:Nanotechnology and Microelectronics, 2011
In the recent past, scaling of semiconductor fabrication systems has been dominated by wavelength and numerical aperture modifications. This is now no longer the case for 193-nm immersion projection lithography (193i) systems as there are no technical paths for continued benefit from the in these areas.
Alan E Rosenbluth   +2 more
exaly   +2 more sources

Streamlining Computational Lithography With Efficient Pattern Database

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Su Zheng, Wenqian Zhao, Bei Yu
exaly   +2 more sources

Using FlexRay in Computational Lithography

Japanese Journal of Applied Physics, 2011
FlexRay programmable illumination and LithoTuner software is combined in several use cases. The first use case is source mask optimization (SMO) in which the process window is maximized for a static random access memory (SRAM) design. In a 55 nm half-pitch contact hole array (k 1 = 0.38, NA= 1.35, λ= 193 nm), the process window ...
Robert Socha   +18 more
openaire   +1 more source

Advances in compute hardware platforms for computational lithography

SPIE Proceedings, 2007
The last six years have seen the increasing advance of computational and algorithmic complexity to compute mask patterns that retain sufficient lithographic fidelity to print and yield well enough to maintain the advances in circuit density that are the engine of the semiconductor economy.
Tom Kingsley   +3 more
openaire   +1 more source

Extension of optical lithography by mask-litho integration with computational lithography

SPIE Proceedings, 2010
Wafer lithography process windows can be enlarged by using source mask co-optimization (SMO). Recently, SMO including freeform wafer scanner illumination sources has been developed. Freeform sources are generated by a programmable illumination system using a micro-mirror array or by custom Diffractive Optical Elements (DOE). The combination of freeform
T. Takigawa, K. Gronlund, J. Wiley
openaire   +1 more source

Computational lithography and computational metrology for nanomanufacturing

2011 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2011
Nanomanufacturing refers to the manufacturing of products with feature dimensions at the nanometer scale. This paper presents the fundamental concepts and key issues of computational lithography and computational metrology for nanomanufacturing. We demonstrate their potentials and challenges by providing several examples carried out in our research ...
openaire   +1 more source

Computing light masks in neutral atom lithography

Journal of Computational Physics, 2006
This paper proposes a numerical method for computing the amplitudes and phases required for a fixed setup of laser beams to create a specified interference pattern in two dimensions. The context of this work is atom lithography, where such a pattern of standing light waves is used to modulate the transverse intensity distribution of a collimated beam ...
Carsten Burstedde   +2 more
openaire   +2 more sources

Computational Lithography for EUV

2020
There are several reasons why computational lithography for advanced EUV lithography is more complex than it is for optical lithography. To begin, OPC for EUV lithography still has all of the requirements of conventional, optical OPC, such as the need to ensure good targeting of dimensions at the best operating point and good dimensional control ...
openaire   +1 more source

New scaling enablers in computational lithography

Optical Microlithography XXXIV, 2021
Market forces have compressed the various node transition phases in the semiconductor supply chain – Pathfinding, Ramp, and HVM. In addition to time pressures, there are competing demands for architectural tradeoffs, novel applications, and emerging imperatives like Machine Learning (ML) and Cloud-readiness.
openaire   +1 more source

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