Results 251 to 260 of about 1,697,138 (284)

Advances in compute hardware platforms for computational lithography

SPIE Proceedings, 2007
The last six years have seen the increasing advance of computational and algorithmic complexity to compute mask patterns that retain sufficient lithographic fidelity to print and yield well enough to maintain the advances in circuit density that are the engine of the semiconductor economy.
Tom Kingsley, John Sturtevant, Steve McPherson, Matt Sexton   +3 more
openaire   +1 more source

Extension of optical lithography by mask-litho integration with computational lithography

SPIE Proceedings, 2010
Wafer lithography process windows can be enlarged by using source mask co-optimization (SMO). Recently, SMO including freeform wafer scanner illumination sources has been developed. Freeform sources are generated by a programmable illumination system using a micro-mirror array or by custom Diffractive Optical Elements (DOE). The combination of freeform
T. Takigawa, K. Gronlund, J. Wiley
openaire   +1 more source

Computational lithography and computational metrology for nanomanufacturing

2011 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2011
Nanomanufacturing refers to the manufacturing of products with feature dimensions at the nanometer scale. This paper presents the fundamental concepts and key issues of computational lithography and computational metrology for nanomanufacturing. We demonstrate their potentials and challenges by providing several examples carried out in our research ...
openaire   +1 more source

Computational Lithography for EUV

2020
There are several reasons why computational lithography for advanced EUV lithography is more complex than it is for optical lithography. To begin, OPC for EUV lithography still has all of the requirements of conventional, optical OPC, such as the need to ensure good targeting of dimensions at the best operating point and good dimensional control ...
openaire   +1 more source

Computing light masks in neutral atom lithography

Journal of Computational Physics, 2006
This paper proposes a numerical method for computing the amplitudes and phases required for a fixed setup of laser beams to create a specified interference pattern in two dimensions. The context of this work is atom lithography, where such a pattern of standing light waves is used to modulate the transverse intensity distribution of a collimated beam ...
Carsten Burstedde, Jürgen Braun, Angela Kunoth   +2 more
openaire   +3 more sources

New scaling enablers in computational lithography

Optical Microlithography XXXIV, 2021
Market forces have compressed the various node transition phases in the semiconductor supply chain – Pathfinding, Ramp, and HVM. In addition to time pressures, there are competing demands for architectural tradeoffs, novel applications, and emerging imperatives like Machine Learning (ML) and Cloud-readiness.
openaire   +1 more source

From Computational Lithography to Computational Inspection: Inverse Lithography Technology (ILT) and Inverse Inspection Technology (IIT)

ECS Transactions, 2010
For semiconductor manufacturers moving toward advanced technology nodes -32nm, 22nm and below - lithography presents the greatest challenge, because it is fundamentally constrained by basic principles of optical physics. Because no major lithography hardware improvements are expected over the next couple years, Computational Lithography has been ...
Linyong Pang, Danping Peng, Peter Hu, Dongxue Chen, Tom Cecil, Lin He, Guangming Xiao, Vikram Tolani, Thuc Dam, KiHo Baik, Bob Gleason   +10 more
openaire   +1 more source

Advanced computational lithography based on information theory

Eighth International Workshop on Advanced Patterning Solutions (IWAPS 2024)
Xu Ma
exaly   +2 more sources

Separable OPC models for computational lithography

SPIE Proceedings, 2008
The challenge for the upcoming full-chip CD uniformity (CDU) control at 32nm and 22nm nodes is unprecedented with expected specifications never before attempted in semiconductor manufacturing. To achieve these requirements, OPC models not only must be accurate for full-chip process window characterization for fine-tuning and matching of the existing
Hua-Yu Liu, Qian Zhao, J. Fung Chen, Jiong Jiang, Robert Socha, Eelco Van Setten, Andre Engelen, Jeroen Meessen, Michael M. Crouse, Mu Feng, Wenjin Shao, Hua Cao, Yu Cao, Lieve Van Look, Joost Bekaert, Geert Vandenberghe, Jo Finders   +16 more
openaire   +1 more source

Computational lithography for nanostructure science and technology

2007 International Semiconductor Device Research Symposium, 2007
There are two paths to nanostructure patterning. Self-assembly is intriguing, as it makes use of the natural tendency of materials to spontaneously coalesce into shapes of technological importance without relying on complex, expensive tools to do the job. But the number of achievable shapes and workable materials is limited, placing severe restrictions
Martin Peckerar, David Sander, Ankur Srivastava, Adakou Foli   +3 more
openaire   +1 more source