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Computational Lithography - Moore Bang for your Buck
2009 22nd International Conference on VLSI Design, 2009There have been many pronouncements about the slowing down of Moore’s Law. Human enterprise, however, has managed to disprove these dim prophecies by producing ingenious solutions on a regular basis, to allow Moore’s Law to continue its unabated march. Many of these solutions are coming from the growing field of Computational Lithography.
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Quantum lithography: A non-computing application of quantum information
Informatik - Forschung und Entwicklung, 2006Quantum information theory holds the promise of revolutionizing technologies other than computing and communications. In this article we show how quantum entanglement can be harnessed to beat the Rayleigh diffraction limit of conventional optical lithography, and to permit nano-devices to be fabricated at a scale arbitrarily shorter than the ...
Colin P. Williams +3 more
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Applied Optics, 1993
An efficient storage format was developed for computer-generated holograms for use in electron-beam lithography. This method employs run-length encoding and Lempel-Ziv-Welch compression and succeeds in exposing holograms that were previously infeasible owing to the hologram's tremendous pattern-data file size.
D M, Newman +5 more
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An efficient storage format was developed for computer-generated holograms for use in electron-beam lithography. This method employs run-length encoding and Lempel-Ziv-Welch compression and succeeds in exposing holograms that were previously infeasible owing to the hologram's tremendous pattern-data file size.
D M, Newman +5 more
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Beyond Lithography: Computers That Assemble Themselves
EDFA Technical Articles, 2005Abstract This article examines current research into the building blocks of the nanoscale system and the techniques used to synthesize them. Also explored are some proposed ideas and the challenges associated with integrating these building blocks into molecular nanosystems such as chemically assembled electronic nanocomputers (CAENs).
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A full-chip 3D computational lithography framework
SPIE Proceedings, 20123D lithography simulations capable of modeling 3D effects in all lithographic processes are becoming critical in OPC and verification applications as semiconductor feature sizes continue to shrink. These effects include mask topography, resist profile and wafer topography. In this work we present an efficient computational framework for full-chip 3D
Peng Liu +7 more
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Extreme Ultraviolet Multilayer Defect Compensation in Computational Lithography
Journal of Nanoscience and Nanotechnology, 2016For the extreme ultraviolet (EUV) lithography, multilayer (ML) defects such as bump and pit defects can disrupt the phase of reflected field and degrade aerial images on wafer. In this paper, a defect printability and repair simulator (DPRS) is introduced to predict and repair the effect of ML defects in EUV aerial images.
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The evolution of patterning process models in computational lithography
SPIE Proceedings, 2010Thirty five years have passed since the first lithography process models were presented, and since that time there has been remarkable progress in the predictive power, performance, and applicability of these models in addressing many different challenges within the semiconductor industry. The impact has been profound, and this paper will attempt to
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Computational lithography: accelerating the future
DTCO and Computational Patterning, 2022openaire +1 more source
Publication guidelines for papers involving computational lithography
Journal of Micro-nanopatterning, Materials, and Metrology, 2021Harry Levinson
exaly