Results 21 to 30 of about 20,255 (223)
Unifying mesh- and tree-based programmable interconnect [PDF]
We examine the traditional, symmetric, Manhattan mesh design for field-programmable gate-array (FPGA) routing along with tree-of-meshes (ToM) and mesh-of-trees (MoT) based designs.
DeHon, André
core +1 more source
XSBench on FPGAs using Intel oneAPI [PDF]
Field-Programmable Gate Arrays (FPGAs) are becoming an interesting component for heterogeneous computing systems in the post-Moore era thanks to their reconfigurable nature.
Pecák Oldřich +2 more
doaj +1 more source
Research on an Intelligent Test Method for Interconnect Resources in an FPGA
With the rapid development of integrated circuit production technology, the scale of FPGA circuits has expanded to billions of gates. The complexity of the internal resource structures in the FPGAs (field programmable gate arrays) is continually ...
Weikun Xie +3 more
doaj +1 more source
Nine articles have been published in this Special Issue on image processing using field programmable gate arrays (FPGAs). The papers address a diverse range of topics relating to the application of FPGA technology to accelerate image processing tasks ...
Donald G. Bailey
doaj +1 more source
Hardware Realization of Generalized Time-Frequency Distribution with Complex-Lag Argument
A hardware implementation of the Nth order complex-lag time-frequency distribution is proposed. The considered distribution provides an arbitrary high concentration for multicomponent signals with fast varying instantaneous frequency.
Srdjan Stanković +2 more
doaj +1 more source
Introduction to FPGA design [PDF]
This paper presents an introduction to digital hardware design using Field Programmable Gate Arrays (FPGAs). After a historical introduction and a quick overview of digital design, the internal structure of a generic FPGA is discussed.
Serrano, J
core +1 more source
We report a new nanoscale antifuse featuring low-power and high-programming speed, by employing silicon carbide (SiC) nanoelectromechanical systems (NEMS).
Tina He +3 more
doaj +1 more source
The Price of Routing in FPGAs [PDF]
Among integrated circuits, field programmable gate arrays (FPGAs) may be the most spectacular benefactors of the steady progress of very large scale integration (VLSI) technology in the last two decades: current FPGA chips offer up to one million ...
de Dinechin, Florent
core +3 more sources
The NAIL Accelerator Interface Layer for Low Latency FPGA Offload
We present the NAIL Accelerator Interface Layer, a framework for offloading accelerated computations to Field Programmable Gate Arrays served across the network.
Edward Grindley +8 more
doaj +1 more source
The current trend in the evolution of sensor systems seeks ways to provide more accuracy and resolution, while at the same time decreasing the size and power consumption.
Gabriel J. García +5 more
doaj +1 more source

