Results 51 to 60 of about 4,456 (178)

"Here, you're all good enough to play": Lessons Learned from the GAA Super Games Centre [PDF]

, 2020
Drop out from youth sport participation is a significant issue that has emerged to become a major health concern around the world. In order to counteract drop out trends in sport, organizations responsible for promoting and sustaining participation have ...
Coffee, Pete; id_orcid, Daly, Pat, Lavallee, David, Lavallee, David; id_orcid, Sheridan, Daragh, Coffee, Pete   +5 more
core  

Vertical Heterojunction Ge0.92Sn0.08/Ge Gate-All-Around Nanowire pMOSFETs

, 2019
International audienceVertical heterojunction Ge 0.92 Sn 0.08 /Ge gate-all-around (GAA) nanowire pMOSFETs fabricated with a top-down approach are reported.
Grap, Thomas, Trellenkamp, Stefan, Buca, Dan, Liu, Mingshan, von den Driesch, Nils, Knoch, Joachim, Hartmann, Jean-Michel, Mertens, Konstantin, Zhao, Qing- Tai, Zhao, Qing-Tai   +9 more
core   +1 more source

Low cost si nanowire biosensors by recrystallisation technologies

, 2011
EThOS - Electronic Theses Online ServiceGBUnited ...
Sun, Kai
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Performance Investigation of SRAM Cells Based on Gate-all-around (GAA) Si Nanowire Transistor for Ultra-low Voltage Applications

, 2012
In this paper, the performance metrics (i.e., read and write margins, operation speed, power consumption) of 6T SRAM cell based on gate-all-around (GAA) Si nanowire transistor (SNWT) at 16nm technology node are investigated, as well as the impacts of ...
Ru Huang, Yangyuan Wang, Wang, Yangyuan, Ou, Jiaojiao, Wang, Runsheng, Jiaojiao Ou, Yuchao Liu, Huang, Ru, Runsheng Wang, Liu, Yuchao   +9 more
core   +1 more source

Gate-all-around silicon nanowire FET modeling

, 2014
As a further extension of the multi-gate MOSFET, the gate-all-around (GAA) silicon nanowire FET is the most promising nanostructure design for next generation semiconductor device. Recent research work demonstrates the excellent device performance of GAA
Chen, Xiangchen
core   +1 more source

Analitical modeling for square gate-all-around MOSFETs [PDF]

, 2014
Two analytical models for square Gate All Around (GAA) MOSFETs has been introduced. The first part of this report include a quantum viewpoint and this first work has been published, while the second part approach a classical developed.
Moreno Pérez, Enrique
core   +1 more source

Low-Temperature (Cryogenic) Transport in Gate-All-Around (GAA) Silicon Nanowire Field-Effect Transistor

This work explores the temperature dependency of the performance of an ultra-thin silicon nanowire (SiNW) gate-all-around field-effect transistor (GAA-FET). The nanowire is assumed coaxially aligned with an ideal cylindrical gate-all-around device.
Shiri, Daryoush,, Nekovei, Reza,, Verma, Amit,   +2 more
core   +1 more source

Characteristics of Gate-All-Around Hetero-Gate-Dielectric Tunneling Field-Effect Transistors

, 2012
In this paper, gate-all-around (GAA) tunneling field-effect transistors (TFETs) with hetero-gate dielectric (HG) materials have been simulated and their characteristics have been optimized as a function of the high-k dielectric length (Lhigh-k).
Choi, Woo Young, Lee, Jae Sung, Kang, In Man   +2 more
core   +1 more source

Comparative Study on Program/Erase Efficiency of 3-D SONOS Flash Memory Cell Transistor: Structural Approach from Multi-Gate (MG) to Gate-All-Around (GAA) FET

, 2020
In this paper, we reported a non-planar 3-D SONOS memory, GAA (Gate-All-Around) SONOS (Silicon-Oxide-Nitride-Silicon-Oxide) memory according to demands for the high-density and low-power nonvolatile memory.
Kwan-Jae Choi, Jun-Hyun Kim, Dong Myong Kim, Kichan Song, Gu-Cheol Seo, Kang, Jieun Jeon, Lee, Kim, Seob Kang, Young Kwan, Tae Yoon Lee, So Ra Park, Seung Hwan Park, Sunyeong Roh, Min Chang, Dae Hwan Kim   +16 more
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Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs

, 2014
The metal-gate granularity-induced threshold voltage (V-T) variability and V-T mismatch in Si gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature ...
NAYAK, K, OLDIGES, PJ, RAO, VR, BAJAJ, M, AGARWAL, S, MURALI, KVRM   +5 more
core   +1 more source