Results 81 to 90 of about 1,279 (182)

Channel-engineered GAA FETs: From device to circuit perspective for Angstrom technology nodes. [PDF]

Sci Rep
Bharath Sreenivasulu V, Thoti N.
europepmc   +1 more source

Influence of Device Structure and Manufacturing Thermal Budget on Channel Release Module in GAA NSFET and Process Optimization. [PDF]

Nanomaterials (Basel)
Wang M, Guo X, Huang Z, Liao M, Liu T, Xu M, Zhang DW.   +6 more
europepmc   +1 more source

Scaling two-dimensional semiconductor nanoribbons for high-performance electronics. [PDF]

Nat Commun
Lan HY, Yang SH, Cho Y, Tan Y, Cai J, Sun Z, Li C, Huang LY, Wan Y, Li LJ, Beechem T, Appenzeller J, Chen Z.   +12 more
europepmc   +1 more source

Dielectric and temperature-dependent optimization of an asymmetric gate-drain engineered core-shell dopingless nanotube tunnel FET for analog and RF performance. [PDF]

Nanoscale Adv
Kumar T R, Priya G L.
europepmc   +1 more source

3D atomic-scale metrology of strain relaxation and roughness in Gate-All-Around transistors via electron ptychography. [PDF]

Nat Commun
Karapetyan S, Zeltmann SE, Wilk G, Chen TK, Hou VD, Muller DA.   +5 more
europepmc   +1 more source

Scaling nanoribbon transistors with monolayer transition metal dichalcogenides. [PDF]

Nat Nanotechnol
Peña T, Persson AEO, Krayev A, Friðriksdóttir Á, Su H, Lee YM, Song YS, Neilson K, Zhang Z, Hoang AT, Yang JA, Hoang L, Wang SX, Mannix AJ, McIntyre PC, Pop E.   +15 more
europepmc   +1 more source

Large-scale gate-all-around MoS₂ transistor array through lossless monolithic 3D integration. [PDF]

Natl Sci Rev
Chen C, Chen K, Zhao H, Lu S, Shang J, Jiang H, Gao L, He X, Jiang S, Chen Z, Zhang Z, Zhang X, Zhang Y.   +12 more
europepmc   +1 more source

Design and performance analysis of a vertically stacked gate-all-around nanosheet FET with embedded nanocavity for biosensing applications. [PDF]

Sci Rep
Prasanna RL, Karumuri SR, Sreenivasulu VB, Kondaveeti GS.   +3 more
europepmc   +1 more source

Development and Performance Analysis of High-K Spacer-Induced Strained Si/SiGe Channel-Based Gate All Around FET for Thermal Effects. [PDF]

Nanomaterials (Basel)
Yugender P, Singh S, Kumar K, Dhar RS, Seteikin AY, Banerjee A, Samusev IG.   +6 more
europepmc   +1 more source

Remote Plasma Selective Silicon Etching Enabled Tunable Sub-Fin Process for Improved Parasitic Bottom Channel Control in Gate-All-Around Nanosheet Field-Effect Transistors. [PDF]

Nanomaterials (Basel)
Li J, Gao Y, Zhang DW.
europepmc   +1 more source