Results 11 to 20 of about 16,309 (85)

Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash

open access: yesIEEE Access
We propose a novel dual-doped cylindrical bit-line (DDC-BL) pad structure for vertical NAND (V-NAND) flash memory to enable efficient bulk erase operation through direct hole injection.
Choasub Kim   +4 more
doaj   +2 more sources

Self-Curable Synaptic Ferroelectric FET Arrays for Neuromorphic Convolutional Neural Network. [PDF]

open access: yesAdv Sci (Weinh), 2023
The primary challenge that ferroelectric field‐effect transistors face is their vulnerability to the repeated program/erase cycle. To solve this issue, an efficient self‐curing method is presented. The proposed method successfully recovers synaptic fatigue damage, enhancing learning accuracy in the convolutional neural network.
Shin W   +8 more
europepmc   +2 more sources

Model-Inversion-Resistant Physical Unclonable Neural Network Using Vertical NAND Flash Memory. [PDF]

open access: yesAdv Sci (Weinh)
Schematic and key features of the proposed forward‐forward physical unclonable neural network (FF‐PUNN), incorporating a concealable physical unclonable function (PUF) layer and forward‐forward (FF) learning. ABSTRACT The growing use of neural networks in privacy‐sensitive applications necessitates architectures that inherently protect both data and ...
Park SH   +8 more
europepmc   +2 more sources

Advancing the Frontiers of HfO<sub>2</sub>-Based Ferroelectric Memories: Innovative Concepts from Materials to Applications. [PDF]

open access: yesAdv Mater
HfO2‐based ferroelectric materials are promising for next‐generation memory technologies by providing outstanding performance aligning with data‐centric computing needs. This review details recent advancements in materials, devices, and integration for HfO2‐based memories, with the goal of identifying both the technological opportunities and remaining ...
Zhou Z   +9 more
europepmc   +2 more sources

Simulation Acceleration of Bit Error Rate Prediction and Yield Optimization of 3D V-NAND Flash Memory

open access: yesIEEE Access, 2023
When designing 3D V-NAND technologies with a gate induced drain leakage (GIDL) assisted erase scheme, many experiments must be conducted to determine the optimal GIDL design targets to achieve fast erase performance and secure yield characteristics ...
Yohan Kim, Soyoung Kim
doaj   +1 more source

Review of ferroelectric field‐effect transistors for three‐dimensional storage applications

open access: yesNano Select, Volume 2, Issue 6, Page 1187-1207, June 2021., 2021
The ideal hysteresis of the ferroelectric thin film for ferroelectric field effect transistor‐based 3‐dimensional storage devices. The navy‐colored solid curve represents the typical displacement field (Dfer) versus voltage (Vfer) hysteresis. The two vertical arrows indicate that only a small portion of the remanent polarization (Pr) is required for ...
Hyeon Woo Park   +2 more
wiley   +1 more source

High Temperature and Width Influence on the GIDL of Nanowire and Nanosheet SOI nMOSFETs

open access: yes, 2023
In this work, an experimental evaluation of Gate-Induce Drain Leakage (GIDL) current is presented for nanowire and nanosheet-based SOI transistors. The effects of fin width and temperature increase are studied. Obtained results indicate that the increase
Michelly De Souza   +7 more
core   +1 more source

A new GIDL erase compact model of 3D NAND flash memory with proper capture cross section

open access: yes, 2022
학위논문(석사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2022.2. 신형철.3차원 수직 channel 낸드 플래시 메모리는 bit density를 향상시키는 방향으로 진화되어왔다. 최근에는 3차원 낸드 플래시 메모리의 bit density를 더욱 향상시키기 위해 CMOS under array 구조가 사용된다.
이걸
core  

ERASE-Seq: Leveraging replicate measurements to enhance ultralow frequency variant detection in NGS data [PDF]

open access: yes, 2018
The accurate detection of ultralow allele frequency variants in DNA samples is of interest in both research and medical settings, particularly in liquid biopsies where cancer mutational status is monitored from circulating DNA. Next-generation sequencing
Laurie Kurihara (5076578)   +14 more
core   +1 more source

A Novel Structure to Improve the Erase Speed in 3D NAND Flash Memory to Which a Cell-On-Peri (COP) Structure and a Ferroelectric Memory Device Are Applied

open access: yes, 2022
In this paper, a Silicon-Pillar (SP) structure, a new structure to improve the erase speed in the 3D NAND flash structure to which ferroelectric memory is applied, is proposed and verified.
Jae Kyeong Jeong   +3 more
core   +1 more source

Home - About - Disclaimer - Privacy