Advancing the Frontiers of HfO<sub>2</sub>-Based Ferroelectric Memories: Innovative Concepts from Materials to Applications. [PDF]
Adv MaterHfO2‐based ferroelectric materials are promising for next‐generation memory technologies by providing outstanding performance aligning with data‐centric computing needs. This review details recent advancements in materials, devices, and integration for HfO2‐based memories, with the goal of identifying both the technological opportunities and remaining ...
Zhou Z +9 more
europepmc +2 more sources
Distinguishing capture cross-section parameter between GIDL erase compact model and TCAD
Japanese Journal of Applied Physics, 2021 Abstract A compact model of 3D NAND enables simulation at circuit- or system-level. Although a compact model for gate-induced-drain-leakage (GIDL)-assisted erase was proposed in a previous study, it is difficult to use practically because it has not been properly validated.
Kul Lee, Hyungcheol Shin
exaly +2 more sources
SiGe-Surrounded Bitline Structure for Enhancing 3D NAND Flash Erase Speed
Applied Sciences (Switzerland)Three-dimensional NAND Flash has adopted the cell-over-peripheral (COP) structure to increase storage density. Unlike the conventional structure, the COP structure cannot directly increase the channel potential via substrate bias during the erase ...
Wonbo Shim
exaly +3 more sources
IEEE Access, 2023 When designing 3D V-NAND technologies with a gate induced drain leakage (GIDL) assisted erase scheme, many experiments must be conducted to determine the optimal GIDL design targets to achieve fast erase performance and secure yield characteristics ...
Yohan Kim, Soyoung Kim
doaj +1 more source
Review of ferroelectric field‐effect transistors for three‐dimensional storage applications
Nano Select, Volume 2, Issue 6, Page 1187-1207, June 2021., 2021 The ideal hysteresis of the ferroelectric thin film for ferroelectric field effect transistor‐based 3‐dimensional storage devices. The navy‐colored solid curve represents the typical displacement field (Dfer) versus voltage (Vfer) hysteresis. The two vertical arrows indicate that only a small portion of the remanent polarization (Pr) is required for ...
Hyeon Woo Park +2 more
wiley +1 more source
Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash
IEEE AccessWe propose a novel dual-doped cylindrical bit-line (DDC-BL) pad structure for vertical NAND (V-NAND) flash memory to enable efficient bulk erase operation through direct hole injection.
Choasub Kim +4 more
doaj +1 more source
1 Transistor‐Dynamic Random Access Memory as Synaptic Element for Online Learning
Advanced Intelligent Systems, Volume 7, Issue 8, August 2025.This work demonstrates the feasibility of utilizing capacitor‐less 1 transistor(1 T)‐dynamic random access memory as synaptic element with multilevel capability, large dynamic range of conductance, high linearity, ultralow energy consumption, high endurance exceeding 1015 cycles, and large integration density for artificial‐intelligence‐of‐things edge ...
MD Yasir Bashir +2 more
wiley +1 more source
Lateral Migration‐based Flash‐like Synaptic Device for Hybrid Off‐chip/On‐chip Training
Advanced Electronic Materials, Volume 10, Issue 4, April 2024.The first‐ever engineering application of lateral migration in charge trap memory, which is perceived as a disadvantage in the memory industry, is proposed to achieve low‐power operation while maintaining superior retention and improving endurance. By varying the length of tunneling oxide, the proposed device diverges from conventional techniques in ...
Min‐Kyu Park +6 more
wiley +1 more source
Investigation of Erase Cycling Induced Joint Dummy Cell Disturbance in Dual-Deck 3D NAND Flash Memory. [PDF]
Micromachines (Basel), 2023 You K, Jin L, Jia J, Huo Z.
europepmc +1 more source
Simulation Study on the Role of GIDL Current for Erase Operation in FeFETs
JSAP Annual Meetings Extended Abstracts, 2021 Mei, Xiaoran +3 more
openaire +1 more source