Results 31 to 40 of about 16,309 (85)
GIDL characteristics on Si1-xGex pFinFET for Low Power Transistors [PDF]
, 2016 학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2016. 2. 신형철.This dissertation presents an investigation of Gate-Induced-Drain-Leakage (GIDL) current in SiliconGermanium (SiGe) p-type FinFET for low power transistors and proposes the guidelines to reduce GIDL current.
강덕승
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Interface-state-induced degradation of GIDL current in n-MOSFETsunder hot-carrier stress [PDF]
, 1996 The dependence of increase in post-stress gate-induced-drain-leakage (GIDL) current in n-MOSFET's on creation of interface states (ΔDit) during hot-carrier stress with VG = 0.5 VD was investigated.
Lai, PT, Zeng, X, Xu, JP, Liu, BY
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Gated-Diode Memory Cell and Array Utilizing GIDL Current [PDF]
, 2014 학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2014. 2. 이종호.In this dissertation, the gated-diode memory cell and array utilizing the gate-induced drain leakage (GIDL) current is proposed and investigated for ultra-high density memory device.
이주완
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GIDL 스트레스 조건 하에서 나노 크기 PMOSFET 열화 분석 [PDF]
, 2017 학위논문 (석사)-- 서울대학교 대학원 공과대학 전기·정보공학부, 2017. 8. 이종호.The device degradation under gate-induced drain leakage (GIDL) mode stress is studied in nano-scale p-MOSFET for DRAM peripheral circuit.
조수앙
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History Erase Effect of Real Memristors
, 2021 Different from the static (power-off) nonvolatile property of a memristor, the history erase effect of a memristor is a dynamic characteristic, which means that under the excitation of switching or different signals, the memristor can forget its initial ...
Yiran Shen, Guangyi Wang
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, 2018 학위논문 (박사)-- 서울대학교 대학원 : 공과대학 전기·컴퓨터공학부, 2018. 8. 박병국, 박영준.We report a method and experiment to detect the transport of the lattice phonons generated by hot electrons during the MOSFET operation.
유낙원
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, 2012 This work studies the gate-induced drain leakage (GIDL) in p- and n-MuGFET structures with different TiN metal gate thickness and high-k gate dielectrics.
Rodrigues, M. +11 more
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, 2023 462.B.3.11.pdf created from the media publications in the SA Election material Collection MS 462, held in the Manuscripts Section of the Stellenbosch Library and Information Service.Newspaper advertisement issued by World University Service (WUS) and ...
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Trap-assisted 터널링 GIDL 전류에서 RTN을 발생시키는 절연체 또는 실리콘 내부 트랩 사이트 특성과 트랩핑 메커니즘 분석 [PDF]
, 2016 학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2016. 2. 신형철.Variable retention time (VRT) phenomenon is one of the main sources which degrade the retention time of DRAM cell, and this phenomenon becomes recently serious issue in DRAM cell transistor. Through various
유성원
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Improved extraction of GIDL in FDSOI devices for proper junction quality analysis
, 2011 International audienceIn this work, an optimized method to extract GIDL parameters has been used to characterize junction quality in FDSOI devices.
Previtali, B. +23 more
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