Results 21 to 30 of about 70 (43)

Effects of Poly-Si Grain Boundary on Retention Characteristics under Cross-Temperature Conditions in 3-D NAND Flash Memory. [PDF]

Micromachines (Basel), 2023
An U, Yoon G, Go D, Park J, Kim D, Kim J, Lee JS.   +6 more
europepmc   +1 more source

Memory characteristics of silicon nanowire transistors generated by weak impact ionization. [PDF]

Sci Rep, 2017
Lim D, Kim M, Kim Y, Kim S.
europepmc   +1 more source

Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory. [PDF]

Materials (Basel), 2010
Sakai S, Takahashi M.
europepmc   +1 more source

A Novel Channel Preparation Scheme to Optimize Program Disturbance in Three-Dimensional NAND Flash Memory. [PDF]

Micromachines (Basel)
You K, Jin L, Jia J, Huo Z.
europepmc   +1 more source

Repurposing Si CMOS nonidealities for stochastic and analog image processing. [PDF]

Sci Adv
Kwak B, Koo RH, Han C, Shin Y, Choi J, Kim D, Lee J, Im J, Cho Y, Lee JH, Shin W, Kwon D.   +11 more
europepmc   +1 more source

CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. [PDF]

Nanomaterials (Basel)
Radamson HH, Miao Y, Zhou Z, Wu Z, Kong Z, Gao J, Yang H, Ren Y, Zhang Y, Shi J, Xiang J, Cui H, Lu B, Li J, Liu J, Lin H, Xu H, Li M, Cao J, He C, Duan X, Zhao X, Su J, Du Y, Yu J, Wu Y, Jiang M, Liang D, Li B, Dong Y, Wang G.   +30 more
europepmc   +1 more source

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3DNAND GIDL-Assisted Body Biasing for Erase Enabling CMOS under Array (CUA) Architecture

2017 IEEE International Memory Workshop (IMW), 2017
The Gate-Induce-Drain-Leakage (GIDL)-assisted body biasing for erase, which is a technique essential to enabling 3DNAND Flash CMOS Under Array architectures, has been extensively studied and successfully optimized to achieve high-performance, reliable erase operation.
Christian Caillat, Kevin Beaman, Andrew Bicksler, Elisa Camozzi, Tecla Ghilardi, Guangyu Huang, Haitao Liu, Yifen Liu, Duo Mao, Salil Mujumdar, Niccolo Righetti, Matt Ulrich, Chandru Venkatasubramanian, Xiangyu Yang, Akira Goda, Srivardhan Gowda, Henok Mebrahtu, Hiroyuki Sanda, Yu Yuwen, Randy Koval   +19 more
exaly   +2 more sources

Compact modeling of GIDL-assisted erase in 3-D NAND Flash strings

Journal of Computational Electronics, 2019
This paper presents a physics-based compact model able to describe the time dynamics of the erase operation in three-dimensional NAND Flash strings exploiting gate-induced drain leakage at the selector to increase the string potential. The model accurately reproduces all the main phases of the erase operation and allows to calculate the threshold ...
Christian Monzio Compagnoni, Alessandro Spinelli, Gerardo Malavena   +2 more
exaly   +2 more sources

Improvement of GIDL-assisted Erase by using Surrounded BL PAD Structure for VNAND

2023 IEEE International Memory Workshop (IMW), 2023
Sunghoi Hur, Jaihyuk Song, Jaehoon Jang   +2 more
exaly   +2 more sources