Results 121 to 130 of about 28,059 (259)
Device-Circuit Level Simulation Study of Three Inputs Complex Logic Gate Designed Using Nano-MOSFETs
Applications of Modelling and Simulation, 2019 Simulation study on silicon-based nano-MOSFETs logic circuits is needed to add more knowledge on the nanoscale circuit performance. Therefore, in this paper, simulation study is carried out on three inputs complex logic gate transistor circuits with four
Ooi Chek Yee
doaj
Small Methods, Volume 10, Issue 12, 23 June 2026.Operational thermal stability in organic thin‐film transistors is engineered through interfacial chemistry and deposition temperature. By pairing F10‐SiPc with different surface treatments and tuning substrate temperature during deposition, distinct transport regimes emerge, ranging from crystalline, trap‐prone behavior to reversible, thermally ...
Forest St‐Denis‐Weintrager +6 more
wiley +1 more source
Design and Construction of a Programmable Electroporation system for Biological Applications
, 2007 Studies into electroporation have grown rapidly in biotechnology and medicine in recent years. This paper presents the design and construction of a low cost programmable electroporation system for biological applications. The system consists of a control
Beeby, Steve +4 more
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MicromachinesThe performance of the Si MOSFET is suppressed when the channel loses its control through the gate. This paper introduces a new and novel high-channel conducting orthogonally oriented selective buried triple gate vertical power MOSFET technology to study
M. Ejaz Aslam Lodhi +4 more
doaj +1 more source
Not Available Not Available Not Available
, 2009 This advisory follows numerous inquiries concerning the operating area of the MOSFET for voltages below the zero temperature coefficient point (sometimes referred to as the linear mode of operation).
Power Mosfet
core
Reduction of Parasitic Capacitance in Vertical MOSFETs by Spacer Local Oxidation
, 2003 Application of double gate or surround-gate vertical metal oxide semiconductor field effect transistors (MOSFETs) is hindered by the parasitic overlap capacitance associated with their oayout, which is considerably larger than for a lateral MOSFET on the
Ashburn, Peter +11 more
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Exploración de dispositivos MOSFET usando COMSOL multiphysics [PDF]
, 2012 In this work, we use the simulator COMSOL Multiphysics to model three types of MOSFETs: bulk channel, DG-MOSFET and SOI-MOSFET. We present an introduction to semiconductor theory. Next we nd the characteristic curves from the MOSFET model provided by
Bustamante Guevara, José
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OPTIMASI PENENTUAN JENIS MOSFET PADA PENGENDALI ELEKTRONIKA MOTOR BLDC
, 2012 BrushLess DC sudah dikenal dikalangan industri hingga penggemar mainan mobil listrik -tamiya, sebagai salah satu jenis motor penggerak yang ringan dan efesien dalam disainnya, tetapi memerlukan komutasi elektronik.
Linggarjati, Jimmy
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A surface-potential-based compact model for partially-depleted silicon-on-insulator MOSFETs
, 2009 With the continuous scaling of CMOS technologies, Silicon-on-Insulator (SOI) technologies have become more competitive compared to bulk, due to their lower parasitic capacitances and leakage currents. The shift towards high frequency, low power circuitry,
Benson, James
core
Um modelo eficiente do transistor MOS para o projeto de circuitos VLSI: [dissertação] [PDF]
, 2007 Dissertação (mestrado) - Universidade Federal de Santa Catarina, Centro Tecnológico. Programa de Pós-Graduação em Engenharia Elétrica.Neste trabalho é detalhada a implementação do modelo ACM do transistor MOS no simulador elétrico ELDO (Mentor Graphics).
Siebel, Osmar Franca
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