Results 51 to 60 of about 28,059 (259)

Twisted MoS2 Bilayers as Functional Elements in Memtransistors: Hysteresis, Optical Signatures, and Photocurrent Kinetics

Advanced Electronic Materials, EarlyView.
ABSTRACT Layered 2D materials are considered as promising for memristive applications due to their ultimate vertical scalability compared to conventional semiconductor films and pronounced hysteresis properties. Bias‐resolved Raman and Photoluminescence mapping is used to quantify strain from phonon shifts and carrier density from the exciton‐trion ...
Vladislav Kurtash, Ilya Eliseyev, Valery Davydov, Heiko O. Jacobs, Jörg Pezoldt   +4 more
wiley   +1 more source

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Modelo compacto de não-linearidades em transistores MOS: [dissertação] [PDF]

, 2006
Dissertação (mestrado) - Universidade Federal de Santa Catarina, Centro Tecnológico. Programa de Pós-Graduação em Engenharia Elétrica.Neste trabalho, é proposto um modelo compacto para não-linearidades em transistores MOS desenvolvido com base nas ...
Silva, Pablo Dutra da
core  

A Dual‐Memory Ferroelectric Transistor Emulating Synaptic Metaplasticity for High‐Speed Reservoir Computing

Advanced Electronic Materials, EarlyView.
A CMOS‐compatible ferroelectric transistor harnesses the interplay between stable gate polarization memory and volatile non‐quasi‐static channel charge dynamics to emulate how biological synapses regulate their own plasticity. This brain‐inspired dual‐memory mechanism, realized in a single device, enables a physical reservoir computer that solves ...
Yifan Wang, Muhammad Sakib Shahriar, Salma Soliman, Noah Vaillancourt, Lance Fernandes, Andrea Padovani, Asif Islam Khan, Md Sakib Hasan, Raisul Islam   +8 more
wiley   +1 more source

Um monitor do estado de carga da bateria de dispositivos eletrônicos implantáveis [PDF]

, 2006
Dissertação (mestrado) - Universidade Federal de Santa Catarina, Centro Tecnológico. Programa de Pós-Graduação em Engenharia ElétricaThis work proposes a system, of very low power consumption, able to monitor the remaining charge of the batteries used in
Machado, Márcio Bender
core  

1 μm gate length, In_0.75Ga_0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737μS/μm [PDF]

, 2008
The first demonstration of implant-free, flatband-mode In_0.75Ga_0.25As channel n-MOSFETs is reported. These 1 μm gate length MOSFETs, fabricated on a structure with average mobility of 7720 cm<sup ...
Moran, D.A.J., Ignatova, O., Asenov, A., Passlack, M., Li, X., Thayne, I.G., Droopad, R., Zhou, H., Fejes, P., Thoms, S., Rajagopalan, K., Hill, R.J.W., Macintyre, D.   +12 more
core   +1 more source

Silicon Nitride Resistive Memories

Advanced Electronic Materials, EarlyView.
Amorphous SiNx is an attractive resistance switching material for ReRAM applications due to its physicochemical properties, such as humidity resistance, low oxygen diffusivity, and is used as a metal diffusion blocker. By modifying the ratio between N and Si atoms, the microstructure of the SiNx is affected, rendering it possible to change the ...
Alexandros‐Eleftherios Mavropoulis, Nikolaos Vasileiadis, Iosif‐Angelos Fyrigos, Emmanouil Stavroulakis, Caroline Bonafos, Pascal Normand, Georgios Ch. Sirakoulis, Panagiotis Dimitrakis   +7 more
wiley   +1 more source

Improved sub-threshold slope in short channel vertical MOSFETs using FILOX oxidation [PDF]

, 2009
This paper investigates the origins of sub-threshold slope degradation in vertical MOSFETs (v-MOSFETs) due to dry etching of the polysilicon surround gate.
Tan, L., Redman-White, W., Ashburn, P, Buiu, O., Hall, S., Hakim, M M A   +5 more
core   +1 more source

Study on Single-event Gate Rupture Mechanism of Asymmetric-trench SiC MOSFET

Yuanzineng kexue jishu
The demand for kilovolt-level radiation-hardened SiC devices in modern spacecraft is urgent. To provide a theoretical basis for the hardening design of SiC MOSFETs against single-event gate rupture (SEGR), a study on the single-event effects of 1 200 V ...
WANG Lihao1, 2, DONG Tao2, FANG Xingyu2, QI Xiaowei2, WANG Liang2, CHEN Miao2, ZHANG Xing1, ZHAO Yuanfu2
doaj   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

Advanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez, Niladri Bhattacharjee, Yuxuan He, Giulio Galderisi, Brojogopal Sapui, Sara Mannaa, Ian O'Connor, Violetta Sessi, Peter Javorka, Thomas Mikolajick, Jens Trommer   +10 more
wiley   +1 more source