Results 31 to 40 of about 4,033 (229)
Materials Requirements of High-Speed and Low-Power Spin-Orbit-Torque Magnetic Random-Access Memory
IEEE Journal of the Electron Devices Society, 2020 As spin-orbit-torque magnetic random-access memory (SOT-MRAM) is gathering great interest as the next-generation low-power and high-speed on-chip cache memory applications, it is critical to analyze the magnetic tunnel junction (MTJ) properties needed to
Xiang Li +7 more
doaj +1 more source
Enabling high-performance LPDDRx-compatible MRAM [PDF]
, 2014 DRAM consumes a significant amount of energy in mobile computing devices today. Emerging non-volatile memory such as magnetoresistive memory (MRAM) offers a DRAM alternative and can potentially lead to a more energy-efficient memory system.
Xiangyu Dong +5 more
core +1 more source
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2017 The spin transfer torque magnetoresistive random access memory (STT-MRAM) is the leading candidate for spin-based memories. Nevertheless, the high write energy and read disturbance of the STT-MRAM motivated researchers to find other solutions.
Ibrahim Ahmed +5 more
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Building and optimizing MRAM-based commodity memories [PDF]
, 2014 Emerging non-volatile memory technologies such as MRAM are promising design solutions for energyefficient memory architecture, especially formobile systems. However, building commodityMRAMby reusing DRAM designs is not straightforward.
Wang, Jue, Dong, Xiangyu, Xie, Yuan
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WiSE : When Learning Assists Resolving STT-MRAM Efficiency Challenges [PDF]
, 2023 Spin Transfer Torque Magnetic RAM (STT-MRAM) is one of the most promising on-chip technologies, which delivers high density, non-volatility, and near-zero leakage power.
Beitollahi, Hakem, +5 more
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Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory
Journal of Low Power Electronics and Applications, 2014 Static random access memory (SRAM) is the most commonly employed semiconductor in the design of on-chip processor memory. However, it is unlikely that the SRAM technology will have a cell size that will continue to scale below 45 nm, due to the leakage ...
Luís Vitório Cargnini +4 more
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System level exploration of a STT-MRAM based level 1 data-cache [PDF]
, 2015 Since Non-Volatile Memory (NVM) technologies are being explored extensively nowadays as viable replacements for SRAM based memories in LLCs and even L2 caches, we try to take stock of their potential as level 1 (L1) data caches.
Gómez Pérez, José Ignacio +4 more
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Correlation between 1064 nm laser attack and thermal behavior in STT-MRAM [PDF]
, 2023 International audienceIn this paper, the impact of a 1064 nm laser attack on an STT-MRAM cell is experimentally studied in real-time, for the first time, during reading and writing operations, in order to understand the behavior of a sensing circuit ...
J. Postel-Pellerin +11 more
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Evaluation of embedded STT-MRAM for Ultra Low Power applications [PDF]
, 2019 National audienceThe complexity of embedded devices increases as today's applications request always more services. However, the power consumption of SoC has significantly increased due to the high-density integration and the high leakage power of ...
Patrigeon, Guillaume +2 more
core +2 more sources
Testing STT-MRAM: Manufacturing Defects, Fault Models, and Test Solutions [PDF]
, 2021 As STT-MRAM mass production and deployment in industry is around the corner, high-quality yet cost-efficient manufacturing test solutions are crucial to ensure the required quality of products being shipped to end customers.
Wu, L. (author)
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