Origin of the Temperature Dependence of Gate-Induced Drain Leakage-Assisted Erase in Three-Dimensional nand Flash Memories. [PDF]
Refaldi DG +4 more
europepmc +1 more source
HaWL: Hidden Cold Block-Aware Wear Leveling Using Bit-Set Threshold for NAND Flash Memory
Seon Hwan KIM +2 more
openalex +2 more sources
Enabling Intra-Plane Parallel Block Erase in NAND Flash to Alleviate the Impact of Garbage Collection [PDF]
Tyler Garrett, Jun Yang, Youtao Zhang
openalex +1 more source
A Novel Channel Preparation Scheme to Optimize Program Disturbance in Three-Dimensional NAND Flash Memory. [PDF]
You K, Jin L, Jia J, Huo Z.
europepmc +1 more source
Area-efficient analog peripheral circuit techniques for Solid State Drive with NAND flash memories
Youngil Kim, Sangsun Lee
openalex +2 more sources
Design of Low-Latency Layered Normalized Minimum Sum Low-Density Parity-Check Decoding Based on Entropy Feature for NAND Flash-Memory Channel. [PDF]
Li Y, Hu H.
europepmc +1 more source
Towards Building Energy Efficient, Reliable, and Scalable NAND Flash Based Storage Systems
Vidyabhushan Mohan
openalex +1 more source

