Results 11 to 20 of about 29,884 (210)

Wordline Input Bias Scheme for Neural Network Implementation in 3D-NAND Flash [PDF]

Biomimetics
In this study, we propose a neuromorphic computing system based on a 3D-NAND flash architecture that utilizes analog input voltages applied through wordlines (WLs).
Hwiho Hwang, Gyeonghae Kim, Dayeon Yu, Hyungjin Kim   +3 more
doaj   +2 more sources

Model‐Inversion‐Resistant Physical Unclonable Neural Network Using Vertical NAND Flash Memory

Advanced Science
The growing use of neural networks in privacy‐sensitive applications necessitates architectures that inherently protect both data and model integrity.
Sung‐Ho Park, Ryun‐Han Koo, Jonghyun Ko, Jiseong Im, Yeongheon Yang, Mingyun Oh, Dongbeen Shin, Gyuweon Jung, Jong‐Ho Lee   +8 more
doaj   +2 more sources

Performance Evaluation of a Low Energy Universal Gate for VLSI with 16nm Technology

NTU Journal of Engineering and Technology, 2022
NAND & NOR logic gates are general purpose logic gates that can be used to build other logic gates. This article describes a new NAND gate based on 3T (3 transistors) which has the correct output logic level and behaves similarly to the previous design ...
Nabeel Abdulrazaq Yaseen , Wael Saad Ahmed alrawe, Khaleel Ali khudhur khudhur   +2 more
doaj   +1 more source

Plasmonic Logic Gates at Optimum Optical Communications Wavelength

Advanced Electromagnetics, 2022
This paper displays a design that realizes all optical logic gates (NOT, AND, OR, NAND, NOR, XOR, XNOR) and consisting of one nanoring and four strips Operates on the principle of resonance.
Z. S. Al-Sabea, A. A. Ibrahim, S. H. Abdulnabi   +2 more
doaj   +3 more sources

A New Type of Classical Logic Circuit with Exponential Speedup

Advanced Intelligent Systems, 2023
Compared with classical algorithms, quantum algorithms can show the advantage of exponential speedup in solving some problems. Solving the NAND‐Tree problem is a typical example, which can be speed up exponentially by quantum walk.
Yingji Zhang, Tian Chen, Xiaoxue Tong, Naiqiao Pan, Xiangdong Zhang   +4 more
doaj   +1 more source

Investigation of Re-Program Scheme in Charge Trap-Based 3D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2021
Early retention or initial threshold voltage shift (IVS) is one of the key reliability challenges in charge trapping memory (CTM) based 3D NAND flash. Re-program scheme was introduced in quad-level-cell (QLC) NAND (Shibata et al., 2007, Lee et al., 2018,
Ting Cheng, Jianquan Jia, Lei Jin, Xinlei Jia, Shiyu Xia, Jianwei Lu, Kaiwei Li, Zhe Luo, Da Li, Hongtao Liu, Qiguang Wang, An Zhang, Daohong Yang, Zongliang Huo   +13 more
doaj   +1 more source

Cascadable all-optical NAND gates using diffractive networks

Scientific Reports, 2022
Owing to its potential advantages such as scalability, low latency and power efficiency, optical computing has seen rapid advances over the last decades.
Yi Luo, Deniz Mengu, Aydogan Ozcan
doaj   +1 more source

Self-Adaption of the GIDL Erase Promotes Stacking More Layers in 3D NAND Flash

Micromachines, 2023
The bit density is generally increased by stacking more layers in 3D NAND Flash. Gate-induced drain leakage (GIDL) erase is a critical enabler in the future development of 3D NAND Flash.
Tao Yang, Bao Zhang, Qi Wang, Lei Jin, Zhiliang Xia   +4 more
doaj   +1 more source

Show Them Nand Gates And They Will Come [PDF]

2006 Annual Conference & Exposition Proceedings, 2020
Comment: 15 ...
Steven Barrett, Jerry Hamann, Dennis Coon, Paul Crips, John Pierre   +4 more
openaire   +2 more sources

A reconfigurable NAND/NOR genetic logic gate [PDF]

BMC Systems Biology, 2012
Engineering genetic Boolean logic circuits is a major research theme of synthetic biology. By altering or introducing connections between genetic components, novel regulatory networks are built in order to mimic the behaviour of electronic devices such as logic gates.
Ángel Goñi-Moreno, Martyn Amos
openaire   +3 more sources