Results 11 to 20 of about 132,420 (284)
Technologies, 2020 Core mapping, in which a core graph is mapped to a network graph to minimize communication, is a common design problem for Systems-on-Chip interconnected by a Network-on-Chip. In conventional multiprocessors, this mapping is area-agnostic as the cores in
Jan Moritz Joseph +4 more
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Performance Evaluation of Application Mapping Approaches for Network-on-Chip Designs
IEEE Access, 2020 Network-on-chip (NoC) is evolving as a better substitute for incorporating a large number of cores on a single system-on-chip (SoC). The dependency on multi-core systems to accomplish the high-performance constraints of composite embedded applications is
Waqar Amin +6 more
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Congestion-aware wireless network-on-chip for high-speed communication
Automatika, 2020 The design of system-on-chip (SoC) requires the complex integration between a multi-number of cores on a single chip. To establish the effective communication between multiple cores there aremore challenging issues on designing the network-on-chip (NoC ...
M. Devanathan +2 more
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Congestion aware low power on chip protocols with network on chip with cloud security
Journal of Cloud Computing: Advances, Systems and Applications, 2022 This article is to analyze the bottleneck problems of NoC in many more applications like multi-processor communication, computer architectures, and network interface processors.
Suresh Ponnan +4 more
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Energy Aware Parallel Scheduling Techniques for Network-on-Chip Based Systems
IEEE Access, 2021 Minimizing execution time, energy consumption, and network load through scheduling algorithms is challenging for multi-processor-on-chip (MPSoC) based network-on-chip (NoC) systems. MPSoC based systems are prevalent in high performance computing systems.
Bichi Bashir Yusuf +3 more
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RecoNoC: a reconfigurable network-on-chip [PDF]
, 2011 This article presents the design of RecoNoC: a compact, highly flexible FPGA-based network-on-chip (NoC), that can be easily adapted for various experiments. In this work, we enhanced this NoC with dynamically reconfigurable shortcuts.
Al Farisi, Brahim +4 more
core +2 more sources
Wireless network-on-chip: a survey
The Journal of Engineering, 2014 To alleviate the complex communication problems arising in the network-on-chip (NoC) architectures as the number of on-chip components increases, several novel interconnect infrastructures have been recently proposed to replace the traditional on-chip ...
Shuai Wang, Tao Jin
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Wireless Network-on-Chip Security Review: Attack Taxonomy, Implications, and Countermeasures
IEEE Access, 2023 Network-on-chip (NoC) is a critical on-chip communication framework that underpins high-performance multicore computing and network system architectures.
Lashmi Kondoth +3 more
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Quarc: a novel network-on-chip architecture [PDF]
, 2008 This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC. The Quarc scheme significantly outperforms the Spidergon NoC through balancing the traffic which is the result of the modifications applied to the topology and ...
Moadeli, M. +2 more
core +1 more source
Transient Error Correction Coding Scheme for Reliable Low Power Data Link Layer in NoC
IEEE Access, 2020 Ensuring reliable data transmission in multicore System on Chip (SoC), which employs Network on Chip (NoC), is a challenging task. This task is well addressed by Error Correcting Codes (ECC) in on-chip as well as off-chip networks.
M. Vinodhini, N. S. Murty, T. K. Ramesh
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