Results 81 to 90 of about 13,076 (221)
Simulating Scaling Effects in Fully Vertical GaN FinFETs
physica status solidi (a), Volume 222, Issue 23, December 2025.Vertical GaN‐on‐GaN unipolar FinFETs have been analyzed and optimized using TCAD modeling. Simulations varying the device dimensions—fin width, height, spacing, and drift layer thickness—have been done. Device designs which optimize the Baliga's figure of merit, breakdown voltage, and switching losses are presented.
Alexander Simko +4 more
wiley +1 more source
Concept Proof of Voltage Suppression across IGBT Application for Fuse‐Current‐Limiting Hybrid DCCBs
IEEJ Transactions on Electrical and Electronic Engineering, Volume 20, Issue 12, Page 1973-1981, December 2025.Abstract DC power systems require reliable and cost‐effective DC circuit breakers (DCCBs). In a previous study, we introduced a hybrid DCCB featuring a current‐limiting fuse, insulated gate bipolar transistor (IGBT), and a varistor connected in parallel.
Yuki Okegawa +8 more
wiley +1 more source
A Fault-Tolerant T-Type Multilevel Inverter Topology with Soft-Switching Capability Based on Si and SiC Hybrid Phase Legs [PDF]
, 2016 The performance of a novel three-phase four-leg fault-tolerant T-Type inverter topology is presented in this paper, which significantly improves the inverter\u27s fault-tolerant capability regarding device switch faults.
Demerdash, Nabeel +4 more
core +1 more source
Novel Selection Criteria of Primary Side Transistors for LLC Resonant Converters [PDF]
, 2018 This work has been supported by the Spanish Government under Project MINECO-17-DPI2016-75760-R, Project DPI2014-56358-JIN and grant FPI BES-2014-070785, and by the Principality of Asturias under Project SV-PA-17-RIS3-4 and FEDER ...
Bauwens, Filip +5 more
core +1 more source
High Voltage, Volume 10, Issue 6, Page 1474-1485, December 2025.ABSTRACT Electric locomotives on the horizon will integrate SiC inverters, promising quicker switching and lower losses than traditional setups. However, in addition to the steep rising edge, the inverter‐fed motor drive system faces challenges such as high common‐mode voltage (CMV) and high motor terminal surge voltage swing rate (dv/dt).
Bo Gao +4 more
wiley +1 more source
Journal of Engineering, 2016 An active gate controlled semiconductor protection switch using SiC-MOSFET is proposed to achieve the fault tolerant operation of ISOP (Input Series and Output Parallel) connected multicell dc-dc converter. The SiC-MOSFET with high temperature capability
Yusuke Hayashi +2 more
doaj +1 more source
A Current-Dependent Switching Strategy for Si/SiC Hybrid Switch-Based Power Converters [PDF]
, 2017 : Hybrid switches configured by paralleling Silicon (Si) Insulated Gate Bipolar Transistors (IGBT) and Silicon Carbide (SiC) Metal-Oxide Semiconductor Field-Effect Transistors (MOSFET) have been verified to be a high-efficiency cost-effective device ...
He, Jiangbiao +2 more
core +1 more source
Advanced Electronic Materials, Volume 11, Issue 19, November 18, 2025.A very high electron concentration film has been achieved through Si doping on (100)‐oriented Ga2O3 substrates. A comprehensive study of Si doping effects on the electronic structure of Ga2O3 epitaxial thin films is performed using synchrotron‐based hard X‐ray photoemission spectroscopy (HAXPES).
Ziqi Zhang +12 more
wiley +1 more source
Scalable Dielectrics Technology for 2D Materials Electronics
Advanced Electronic Materials, Volume 11, Issue 19, November 18, 2025.This paper provides an overview of dielectrics technology for 2D electronics. Integration challenges and state‐of‐the‐art solutions are discussed for different classes of insulating materials, from layered dielectrics to high‐k insulators deposited by atomic layer deposition (ALD), with a special focus on the scalability.
Emanuela Schilirò +4 more
wiley +1 more source
Bias temperature instability and condition monitoring in SiC power MOSFETs [PDF]
, 2018 Threshold voltage shift due to bias temperature instability (BTI) is a major concern in SiC power MOSFETs. The SiC/SiO2 gate dielectric interface is typically characterized by a higher density of interface traps compared to the conventional Si/SiO2 ...
Alatise, Olayiwola M. +1 more
core +1 more source