Results 11 to 20 of about 16,109 (304)

Single Event Upset: An Embedded Tutorial [PDF]

21st International Conference on VLSI Design (VLSID 2008), 2008
With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends such as transistor down-sizing, use of new materials, and system on chip architectures continue to increase the sensitivity of systems to soft errors.
Fan Wang, Vishwani D. Agrawal
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Single Event Upset

, 2021
In Universe, there are innumeral activities that keep on happening and a lot of effects that are produced as outcomes. One such example is Single Event Upset. SEU is the error generated in the operation performed by a due to the strike between a single ionizing particle like electron, proton or neutron and a sensitive node in micro-electronic device ...
Jilani, Aavesh, Naaz, Rohaila, Sharma, Diksha   +2 more
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Single-Event Upsets in Microelectronics [PDF]

MRS Bulletin, 2003
AbstractThis article introduces the February 2003 issue of MRS Bulletin on “Single-Event Upsets (SEUs) in Microelectronics.” These radiation effects in devices and circuits have been recognized in recent years as a key reliability concern for many current and future silicon-based technologies.
Henry H.K. Tang, Nils Olsson
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Single event upset reinforcement technology of DICE flip-flop based on layout design

Xibei Gongye Daxue Xuebao, 2022
D flip-flop is the basis of timing logic circuit, and SEMU phenomenon tends to be serious with the integrated circuit process size shrinking to nanometer scale.
LAI Xiaoling, ZHANG Jian, JU Ting, ZHU Qi, GUO Yangming   +4 more
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Double Node Upset Immune RHBD-14T SRAM Cell for Space and Satellite Applications

IEEE Access, 2023
Deep sub-micron memory devices play a crucial role in space electronic applications due to their susceptibility to single-event upset and double-node upset types of soft errors. When a charged particle from space hit a scaled memory circuit, the critical
Pavan Kumar Mukku, Rohit Lorenzo
doaj   +1 more source

Single-Event Upset Analysis and Protection in High Speed Circuits [PDF]

, 2006
The effect of single-event transients (SETs) (at a combinational node of a design) on the system reliability is becoming a big concern for ICs manufactured using advanced technologies. An SET at a node of combinational part may cause a transient pulse at
Lofti-Kamran, P., Di Natale, Giorgio, Hosseinabady M., Benso, Alfredo, Lofti Kamran P., Prinetto, Paolo Ernesto, Hosseinabady, M., Di Carlo, Stefano   +7 more
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Monitor of the single event upsets and linear energy transfer of space radiation on the Beidou navigation satellites

Open Astronomy, 2023
The single event effect caused by space heavy ion radiation is one of the important factors affecting the safety and operation of spacecraft on orbit.
Zhang Binquan, Zhang Shenyi, Shen Guohong, Tuo Changsheng, Zhang Xin, Zhang Huanxin, Quan Lin, Tian Chao, Hou Donghui, Zhou Ping, Ji Wentao   +10 more
doaj   +1 more source

Measurements of Single Event Upset in ATLAS IBL

Journal of Instrumentation, 2020
Effects of Single Event Upsets (SEU) and Single Event Transients (SET) are studied in the FE-I4B chip of the innermost layer of the ATLAS pixel system. SEU/SET affect the FE-I4B Global Registers as well as the settings for the individual pixels, causing, among other things, occupancy losses, drops in the low voltage currents, noisy pixels, and silent ...
Balbi, G., Barbero, M., Beccherle, R., Bindi, M., Breugnon, P., Butti, P., Cinca, D., Dickinson, J., Ferrere, D., Fougeron, D., Garcia-Sciveres, M., Garcia Pascual, J., Gaudiello, A., Gemme, C., Giangiacomi, N., Hemperek, T., Jeanty, L., Kepka, O., Kocian, M., Lantzsch, K., Liu, P., Martin, C., Mekkaoui, A., Menouni, M., Potamianos, K., Rozanov, A., Takubo, Y., Wensing., M.   +27 more
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A High-Reliability 12T SRAM Radiation-Hardened Cell for Aerospace Applications

Micromachines, 2023
The static random-access memory (SRAM) cells used in the high radiation environment of aerospace have become highly vulnerable to single-event effects (SEE).
Ruxue Yao, Hongliang Lv, Yuming Zhang, Xu Chen, Yutao Zhang, Xingming Liu, Geng Bai   +6 more
doaj   +1 more source

Influence of Punch Trough Stop Layer and Well Depths on the Robustness of Bulk FinFETs to Heavy Ions Impact

IEEE Access, 2022
This study analyzes the effects of the punch-through stop (PTS) layer and well depth in a bulk FinFET SRAM cell on the fraction of charge generated by an ion impact that is collected by the FinFET channel.
Antonio Calomarde, Salvador Manich, Antonio Rubio, Francisco Gamiz   +3 more
doaj   +1 more source