Results 11 to 20 of about 315,481 (343)
A guideline for heavy ion radiation testing for Single Event Upset (SEU) [PDF]
, 1984 A guideline for heavy ion radiation testing for single event upset was prepared to assist new experimenters in preparing and directing tests. How to estimate parts vulnerability and select an irradiation facility is described.
Malone, C., Nichols, D. K., Price, W. E.
core +2 more sources
Mitigating bit flips or single event upsets in epilepsy neurostimulators
Epilepsy and Behavior Case Reports, 2016 Objectives: The objective of this study was to review software errors known as single event upsets (SEUs) or bit flips due to cosmic rays in epilepsy neurostimulators. Materials and methods: A case report of a single event upset or bit flip is discussed;
Alice X. Dong +4 more
doaj +3 more sources
Single event upset tests of an 80Mbit/s optical receiver [PDF]
, 2000 6th Workshop on Electronics for LHC Experiments +7 more
core +3 more sources
Bootstrapped Driver and the Single-Event-Upset Effect [PDF]
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020 As VLSI circuits are progressing in very Deep Submicron (DSM) regime without decreasing chip area, the importance of global interconnects increases but at the cost of performance and power consumption. This work proposes a low power circuit for driving a global interconnect at voltages close to the noise level. In order to address ultra-low power (ULP)
Mohammed Al-daloo +3 more
openaire +2 more sources
Fushe yanjiu yu fushe gongyi xuebao, 2021 This study investigates the AD574, a 12-bit analog/digital converter (ADC) produced by American Analog Devices, Inc. (ADI) using bipolar/I2L technology. The test samples are subjected to a total ionizing dose (TID) of 400 Gy(Si) under 60Co γ irradiation.
XIANG Chuanfeng +10 more
doaj +1 more source
IEEE Transactions on Nuclear Science, 2007 J R Schwank, M R Shaneyfelt, J A Felix
exaly +3 more sources
Single Event Upset: An Embedded Tutorial [PDF]
21st International Conference on VLSI Design (VLSID 2008), 2008 With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends such as transistor down-sizing, use of new materials, and system on chip architectures continue to increase the sensitivity of systems to soft errors.
Fan Wang, Vishwani D. Agrawal
openaire +1 more source
, 2021 In Universe, there are innumeral activities that keep on happening and a lot of effects that are produced as outcomes. One such example is Single Event Upset. SEU is the error generated in the operation performed by a due to the strike between a single ionizing particle like electron, proton or neutron and a sensitive node in micro-electronic device ...
Jilani, Aavesh +2 more
openaire +1 more source
Single-Event Upsets in Microelectronics [PDF]
MRS Bulletin, 2003 AbstractThis article introduces the February 2003 issue of MRS Bulletin on “Single-Event Upsets (SEUs) in Microelectronics.” These radiation effects in devices and circuits have been recognized in recent years as a key reliability concern for many current and future silicon-based technologies.
Henry H.K. Tang, Nils Olsson
openaire +1 more source
Double Node Upset Immune RHBD-14T SRAM Cell for Space and Satellite Applications
IEEE Access, 2023 Deep sub-micron memory devices play a crucial role in space electronic applications due to their susceptibility to single-event upset and double-node upset types of soft errors. When a charged particle from space hit a scaled memory circuit, the critical
Pavan Kumar Mukku, Rohit Lorenzo
doaj +1 more source