Results 31 to 40 of about 315,481 (343)
Highly Reliable Quadruple-Node Upset-Tolerant D-Latch
As CMOS technology scaling pushes towards the reduction of the length of transistors, electronic circuits face numerous reliability issues, and in particular nodes of D-latches at nano-scale confront multiple-node upset errors due to their operation in ...
Seyedehsomayeh Hatefinasab +4 more
doaj +1 more source
In space environments, radiation particles affect the stored values of SRAM cells, and these effects, such as single-event upsets (SEUs) and single-event multiple-node upsets (SEMNUs), pose a threat to the reliability of systems used in the space ...
Hong-Geun Park, Sung-Hun Jo
doaj +1 more source
Single-event upset simulation and detection in configuration memory
Single-event upsets (SEUs) from radiation strikes in configuration memory are potentially catastrophic due to their widespread effects. For field-programmable gate arrays (FPGAs), faults in configuration memory propagate into the implemented logic design
Hezekiah Austin +8 more
doaj +1 more source
Active Radiation-Hardening Strategy in Bulk FinFETs
In this article, we present a new method to mitigate the effect of the charge collected by trigate FinFET devices after an ionizing particle impact. The method is based on the creation of an internal structure that generates an electrical field that ...
Antonio Calomarde +3 more
doaj +1 more source
First evaluation of neutron induced single event effects on the CMS barrel muon electronics [PDF]
Neutron irradiation tests of the currently available electronics for the CMS barrel muon detector were performed using Thermal and fast neutrons at E< 11MeV.
Agosteo, S +6 more
core +1 more source
A Machine Learning Approach to Predicting Single Event Upsets
A single event upset (SEU) is a critical soft error that occurs in semiconductor devices on exposure to ionising particles from space environments. SEUs cause bit flips in the memory component of semiconductors. This creates a multitude of safety hazards as stored information becomes less reliable.
Archit Gupta +4 more
openaire +2 more sources
This paper presents two novel quadruple cross-coupled memory cell designs, namely QCCM10T and QCCM12T, with protection against single event upsets (SEUs) and double-node upsets (DNUs).
Aibin Yan +6 more
doaj +1 more source
Dynamic Robust Single-Event Upset Simulator
This paper presents the dynamic robust single-event upset simulator, which is a novel framework for fault injection on hardware (via onchip debugging) and simulation testbeds (via the Simics® full-...
Edward Carlisle, Alan D. George
openaire +1 more source
Efficacy of Transistor Interleaving in DICE Flip-Flops at a 22 nm FD SOI Technology Node
Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should
Christopher J. Elash +6 more
doaj +1 more source
Clinical Insights Into Hypercalcemia of Malignancy in Childhood
ABSTRACT Hypercalcemia of malignancy (HCM) is a rare but life‐threatening metabolic emergency in children that occurs in less than 1% of pediatric cancer cases, with a reported incidence ranging from 0.4% to 1.0% across different studies. While it is observed in 10%–20% of adult malignancies, pediatric HCM remains relatively uncommon.
Hüseyin Anıl Korkmaz
wiley +1 more source

