Results 291 to 300 of about 315,481 (343)

Estimating the effect of single-event upsets on microprocessors

2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014
Evaluating the impact of single-event upsets (SEUs) on complex VLSI circuits in general, and microprocessors in particular, requires an interdisciplinary approach, that includes soft error modeling, accelerated measurements, derating of the raw error rates, and specialized design tools.
Cristian Constantinescu, Srini Krishnamoorthy, Tuyen Nguyen   +2 more
openaire   +1 more source

Design Optimization for Robustness to Single Event Upsets

24th IEEE VLSI Test Symposium, 2006
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustness of a logic gate is developed. This model is integrated with area and performance constraints into an optimization framework based on geometric programming for design space ...
Quming Zhou, Mihir R. Choudhury, Kartik Mohanram   +2 more
openaire   +1 more source

Detecting Single Event Upsets in Embedded Software

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC), 2018
The past decade has seen explosive growth in the use of small satellites. Within this domain, there has been a growing trend to place more responsibility on the flight software (versus hardware) and an increasing adoption of consumer-grade microprocessors to satisfy this desire for increased processing capability while still minimizing size, weight ...
Robert G. Pettit IV, Aedan D. Pettit
openaire   +1 more source

Single-event upset in the PowerPC750 microprocessor

IEEE Transactions on Nuclear Science, 2001
Proton and heavy ion upset susceptibility has been measured individually for six types of storage elements in an advanced commercial processor, the PowerPC750, from two manufacturers: Motorola and IBM. Data on interfering program malfunctions was also collected. Compared to earlier PPC603e results, the upset susceptibility has decreased somewhat.
G.M. Swift, F.F. Fannanesh, S.M. Guertin, F. Irom, D.G. Millward   +4 more
openaire   +1 more source

Single event upset at gigahertz frequencies

IEEE Transactions on Nuclear Science, 1994
Single Event Upset (SEU) characteristics of a digital emitter coupled logic (ECL) device clocking at 0.5, 1, and 3.2 GHz and at temperatures of 5, 75, and 105/spl deg/ C are presented. The test technique is explained. Observations of two types of upsets, phase upsets at low Linear Energy Transfer (LETs) and amplitude upsets at high LETs are also ...
M. Shoga, K. Jobe, M. Glasgow, M. Bustamante, E. Smith, R. Koga   +5 more
openaire   +1 more source

Single Event Upset: Experimental

1997
The discussion in this chapter centers around the major single event upset (SEU) simulation sources. Their importance lies in the fact that simulation methods are one of the few means by which microcircuit susceptibility to SEU can be measured. These sources and source types are few in number, principally because of the somewhat unusual properties of ...
George C. Messenger, Milton S. Ash
openaire   +1 more source

Single event upset rates in space

IEEE Transactions on Nuclear Science, 1992
SEUs (single event upsets) in the CRRES (Combined Release and Radiation Effects Satellite) MEP (Microelectronic Package Space Experiment) showed a dramatic increase during a solar flare, the influence of the flare varied widely among device types, and a GaAs RAM (random access memory) showed a different response to the proton belts than some 51 RAMs ...
A. Campbell, P. McDonald, K. Ray
openaire   +1 more source

Single Event Upset Testing

1988
Abstract : This report presents the results of an experimental program to characterize single event upset phenomena in selected bipolar memory devices irradiated with relativistic heavy ions. The principle objective was to determine the multibit upset rate at normal and parallel beam incidence angles.
Paul R. Measel, Jerry L. Wert, Dennis L. Oberg, Tommy L. Criswell   +3 more
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Mechanisms Leading to Single Event Upset

IEEE Transactions on Nuclear Science, 1986
SRAM cell recovery time following a 140 MeV Krypton strike on a Sandia SRAM is modelled using a two-dimensional transient numerical simulator and circuit code. Strikes at both n- and p-channel "off" drains are investigated. Four principle results are obtained.
C. L. Axness, H. T. Weaver, J. S. Fu, R. Koga, W. A. Kolasinski   +4 more
openaire   +1 more source

Laser Simulation of Single Event Upsets

IEEE Transactions on Nuclear Science, 1987
A pulsed picosecond laser was used to produce upsets in both a commercial bipolar logic circuit and a specially designed CMOS SRAM test structure. Comparing the laser energy necessary for producing upsets in transistors that have different upset sensitivities with the single event upset (SEU) level predicted from circuit analysis showed that a ...
S. P. Buchner, D. Wilson, K. Kang, D. Gill, J. A. Mazer, W. D. Raburn, A. B. Campbell, A. R. Knudson   +7 more
openaire   +1 more source