A Comprehensive Methodology for Soft Error Rate (SER) Reduction in Clock Distribution Network
ChipsSingle Event Transients (SETs) in clock-distribution networks are a major source of soft errors in synchronous systems. We present a practical framework that assesses SET risk early in the design cycle, before layout and parasitics, using a Vulnerability
Jorge Johanny Saenz-Noval +2 more
doaj +1 more source
Xilinx Kintex-UltraScale Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report [PDF]
This is an independent investigation that evaluates the single event destructive and transient susceptibility of the Xilinx Kintex-UltraScale device. Design/Device susceptibility is determined by monitoring the device under test (DUT) for Single Event ...
Berg, Melanie +5 more
core +1 more source
From vulnerability to robustness: Radiation-hard isolation for BPR-enabled stacked nanosheet CFETs
Nuclear Engineering and TechnologyThe integration of Buried Power Rail (BPR) and Complementary FET (CFET) technologies is a promising way to improve power efficiency and circuit density in advanced logic devices.
Dongwook Kim +4 more
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Compendium of Current Single Event Effects for Candidate Spacecraft Electronics for NASA [PDF]
NASA spacecraft are subjected to a harsh space environment that includes exposure to various types of ionizing radiation. The performance of electronic devices in a space radiation environment are often limited by their susceptibility to single event ...
Berg, Melanie D. +8 more
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Dynamic partial reconfiguration scheme for fault-tolerant FFT processor based on FPGA
The Journal of Engineering, 2019 The fast Fourier transform FFT processor is an important part of the space real-time signal processing system based on field programmable gate array (FPGA).
Xin Wei, Yi Z Xie, Yu Xie, He Chen
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The physics of a single-event upset in integrated circuits: A review and critique of analytical models for charge collection [PDF]
When an energetic particle (kinetic energy 0.5 MeV) originating from a radioactive decay or a cosmic ray transverse the active regions of semiconductor devices used in integrated circuit (IC) chips, it leaves along its track a high density electron hole
Vonroos, O., Zoutendyk, J.
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RHLP-18T: A Radiation-Hardened 18T SRAM with Enhanced Read Stability and Low Power Consumption
Applied SciencesElectronic equipment in space is constantly exposed to high-energy particles, which can induce Single Event Upsets (SEUs) in memory components, threatening system reliability.
Han-Gyeol Kim, Sung-Hun Jo
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Atmospheric neutron inducing single event effects on AI chips manufacturing with 8 nm FinFET
Nuclear Engineering and Technology--With the rapid advancement of artificial intelligence (AI) chips in diverse applications, single event effects (SEE) caused by high energy particles in ambient environment have emerged as a critical concern.
Yonghong Li +7 more
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NASA Electronic Parts and Packaging (NEPP) Field Programmable Gate Array (FPGA) Single Event Effects (SEE) Test Guideline Update [PDF]
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing ...
Berg, Melanie D., LaBel, Kenneth A.
core +1 more source
A multi-node-upset-resilient 14T SRAM with high read stability for space applications
Nuclear Engineering and TechnologyThis paper proposes a voltage-booster read-decoupled radiation-hardened 14T (BDRH14T) SRAM cell. In harsh environments such as space, radiation can flip the stored data in memory cells, resulting in soft errors, including single-event upset (SEU) and ...
Sung-Jun Lim, Sung-Hun Jo
doaj +1 more source