Results 11 to 20 of about 16,144 (237)
Update of Single Event Effects Radiation Hardness Assurance of Readout Integrated Circuit of Infrared Image Sensors at Cryogenic Temperature [PDF]
Sensors, 2018 This paper review presents Single Event Effects (SEE) irradiation tests under heavy ions of the test-chip of D-Flip-Flop (DFF) cells and complete readout integrated circuits (ROIC) as a function of temperature, down to 50 K.
Laurent Artola +9 more
doaj +2 more sources
Mitigating bit flips or single event upsets in epilepsy neurostimulators [PDF]
Epilepsy and Behavior Case Reports, 2016 Objectives: The objective of this study was to review software errors known as single event upsets (SEUs) or bit flips due to cosmic rays in epilepsy neurostimulators. Materials and methods: A case report of a single event upset or bit flip is discussed;
Alice X. Dong +4 more
doaj +2 more sources
Investigation of Radiation Hardened TFET SRAM Cell for Mitigation of Single Event Upset
IEEE Journal of the Electron Devices Society, 2020 This study analyzes the soft error sensitivity of SRAM cell which employs double-gate tunnel field effect transistor (DG TFET). The mitigation technique for the data recovery after the heavy ion strike is discussed.
M. Pown, B. Lakshmi
doaj +2 more sources
Single-Event-Upset (SEU) Awareness in FPGA Routing
2007 44th ACM/IEEE Design Automation Conference, 2007 Shahin Golshan, Eli Bozorgzadeh
semanticscholar +3 more sources
Redundancy or GaAs? Two different approaches to solve the problem of SEU (Single Event Upset) in a digital optical link [PDF]
, 2000 B. Dinkespiler +9 more
openalex +3 more sources
Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA
, 2013 Reza OmidiGosheblagh, Karim Mohammadi
openalex +2 more sources
Fushe yanjiu yu fushe gongyi xuebao, 2021 This study investigates the AD574, a 12-bit analog/digital converter (ADC) produced by American Analog Devices, Inc. (ADI) using bipolar/I2L technology. The test samples are subjected to a total ionizing dose (TID) of 400 Gy(Si) under 60Co γ irradiation.
XIANG Chuanfeng +10 more
doaj +1 more source
IEEE Access, 2022 This study analyzes the effects of the punch-through stop (PTS) layer and well depth in a bulk FinFET SRAM cell on the fraction of charge generated by an ion impact that is collected by the FinFET channel.
Antonio Calomarde +3 more
doaj +1 more source
Novel Radiation Hardened SOT-MRAM Read Circuit for Multi-Node Upset Tolerance
IEEE Open Journal of Nanotechnology, 2022 The rapid transistor scaling and threshold voltage reduction pose several challenges such as high leakage current and reliability issues. These challenges also make VLSI circuits more susceptible to soft-errors, particularly when subjected to harsh ...
Alok Kumar Shukla +5 more
doaj +1 more source
Active Radiation-Hardening Strategy in Bulk FinFETs
IEEE Access, 2020 In this article, we present a new method to mitigate the effect of the charge collected by trigate FinFET devices after an ionizing particle impact. The method is based on the creation of an internal structure that generates an electrical field that ...
Antonio Calomarde +3 more
doaj +1 more source