Results 31 to 40 of about 962 (213)
Computer systems onboard FORMOSAT-2 (F2) and FORMOSAT-3/COSMIC (F3/C) satellites often register abnormal signatures which are recorded as automatic reconfiguration orders (ARO) in F2, and reboot/reset (RBS) in F3/C.
Tsung-Ping Lee +7 more
doaj +1 more source
In space environments, radiation particles affect the stored values of SRAM cells, and these effects, such as single-event upsets (SEUs) and single-event multiple-node upsets (SEMNUs), pose a threat to the reliability of systems used in the space ...
Hong-Geun Park, Sung-Hun Jo
doaj +1 more source
LEO Single Event Upset Emulator for Validation of FPGA Based Avionics Systems [PDF]
This paper presents a complete design and implementation of a Single Event Upset (SEU) emulation system that can be used to inject faults Static Random Access Memory (SRAM) based Field Programmable Gate Array (FPGA).
Asami, Kenichi +6 more
core +4 more sources
SETTOFF : a fault tolerant flip-flop for building cost-efficient reliable systems [PDF]
Conventional fault tolerance techniques either require big overheads or have limited reliability. We propose a novel fault tolerant flip-flop (SETTOFF) that addresses timing errors and soft errors in one cost-efficient architecture. In SETTOFF, most SEUs
Zwolinski, Mark +3 more
core +1 more source
Field programmable gate arrays (FPGAs) are getting more attention in safety-related and safety-critical application development of nuclear power plant instrumentation and control systems.
T.S. Nidhin +4 more
doaj +1 more source
Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA
SRAM based FPGAs are attracting considerable interest especially in aerospace applications due to their high reconfigurability, low cost and availability. However, these devices are strongly susceptible to space radiation effects which are able to cause unwanted single event upsets (SEUs) in the configuration memory.
Karim Mohammadi, Reza OmidiGosheblagh
openaire +1 more source
NI Based System for Seu Testing of Memory Chips for Avionics
This paper presents the results of implementation of National Instrument based system for Single Event Upset testing of memory chips into neutron generator experimental facility, which used for SEU tests for avionics purposes. Basic SEU testing algorithm
Boruzdina Anna +3 more
doaj +1 more source
Mitigating bit flips or single event upsets in epilepsy neurostimulators
Objectives: The objective of this study was to review software errors known as single event upsets (SEUs) or bit flips due to cosmic rays in epilepsy neurostimulators. Materials and methods: A case report of a single event upset or bit flip is discussed;
Alice X. Dong +4 more
doaj +1 more source
A computational analysis on the role of low energy proton-induced single event upset in a 65 nm CMOS SRAM [PDF]
This investigation is a computational analysis of a kind of radiation effect on electronic devices, known as the single event upset (SEU) with the Geant4 toolkit.
M. Soleimaninia,, G. Raisali, A. Moslehi
doaj +1 more source
Harnessing Natural Compounds in Psoriasis: Targeting Cellular Pathways for Effective Therapy
Natural compounds act on key cellular pathways in psoriasis by suppressing keratinocyte hyperproliferation, modulating Th17/IL‐17‐mediated immune responses, and reducing oxidative stress. These multi‐target effects highlight their potential as safer adjunctive therapies alongside conventional treatments.
Hye Jin Lee +9 more
wiley +1 more source

