Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA
International Journal of Computer Applications, 2013 SRAM based FPGAs are attracting considerable interest especially in aerospace applications due to their high reconfigurability, low cost and availability. However, these devices are strongly susceptible to space radiation effects which are able to cause unwanted single event upsets (SEUs) in the configuration memory.
Karim Mohammadi, Reza OmidiGosheblagh
openaire +2 more sources
SEU Hardened D Flip-Flop Design with Low Area Overhead [PDF]
Micromachines, 2023 D flip-flop (DFF) is the basic unit of sequential logic in digital circuits. However, because of an internal cross-coupled inverter pair, it can easily appear as a single event upset (SEU) when hit by high-energy particles, resulting in the error in the ...
Chenyu Yin +3 more
doaj +2 more sources
Redundancy or GaAs? Two different approaches to solve the problem of SEU (Single Event Upset) in a digital optical link [PDF]
, 2000 Andrieux, M L +9 more
core +5 more sources
A guideline for heavy ion radiation testing for Single Event Upset (SEU) [PDF]
, 1984 A guideline for heavy ion radiation testing for single event upset was prepared to assist new experimenters in preparing and directing tests. How to estimate parts vulnerability and select an irradiation facility is described.
Malone, C., Nichols, D. K., Price, W. E.
core +2 more sources
Enhancing the Reliability of AD936x-Based SDRs for Aerospace Applications via Active Register Scrubbing and Autonomous Fault Recovery [PDF]
SensorsSingle Event Upsets (SEUs) in Commercial Off-The-Shelf (COTS) Software-Defined Radios (SDRs) are frequent in a erospace applications, especially in GEO (Geostationary Orbit) orbit during severe solar activity, and can lead to unexpected register ...
Jinyang Wang, Zhugang Wang, Li Zhou
doaj +2 more sources
A Lightweight Method for Detecting and Correcting Errors in Low-Frequency Measurements for In-Orbit Demonstrators [PDF]
SensorsIn the pursuit of enhancing the technological maturity of innovative magnetic sensing techniques, opportunities presented by in-orbit platforms (IOD/IOV experiments) provide a means to evaluate their in-flight capabilities.
María-Ángeles Cifredo-Chacón +2 more
doaj +2 more sources
Low power and high-speed quadrate node upset tolerant latch design using CNTFET [PDF]
Scientific ReportsScalability, leakage, short-channel effects, and reliability problems are some of the difficulties facing the semiconductor industry as it continues to experience a reduction in size.
Shaik Asiya, Satheesh Kumar S
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Update of Single Event Effects Radiation Hardness Assurance of Readout Integrated Circuit of Infrared Image Sensors at Cryogenic Temperature [PDF]
Sensors, 2018 This paper review presents Single Event Effects (SEE) irradiation tests under heavy ions of the test-chip of D-Flip-Flop (DFF) cells and complete readout integrated circuits (ROIC) as a function of temperature, down to 50 K.
Laurent Artola +9 more
doaj +2 more sources
SEU-Hardened High-Speed SRAM Design with Self-Refresh and Adjacent-Bit Error Correction [PDF]
MicromachinesThis paper proposes a high-speed static random access memory (SRAM) architecture that integrates a self-refresh mechanism with a novel single error and adjacent-bit errors correction (SEABEC) scheme to enhance resilience against single-event upsets (SEUs)
Tianwen Li, Jianbing Tian, Jingli Qi
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Mitigating bit flips or single event upsets in epilepsy neurostimulators [PDF]
Epilepsy and Behavior Case Reports, 2016 Objectives: The objective of this study was to review software errors known as single event upsets (SEUs) or bit flips due to cosmic rays in epilepsy neurostimulators. Materials and methods: A case report of a single event upset or bit flip is discussed;
Alice X. Dong +4 more
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