Results 71 to 80 of about 253 (176)

Atmospheric neutron inducing single event effects on AI chips manufacturing with 8 nm FinFET

Nuclear Engineering and Technology
--With the rapid advancement of artificial intelligence (AI) chips in diverse applications, single event effects (SEE) caused by high energy particles in ambient environment have emerged as a critical concern.
Yonghong Li, Jianan Tong, Weitao Yang, Zhiliang Hu, Lihua Mo, Tianjiao Liang, Chaohui He, Jinghui Lan   +7 more
doaj   +1 more source

Enhancement of Deep Neural Network Recognition on MPSoC with Single Event Upset. [PDF]

Micromachines (Basel), 2023
Yang W, Song W, Guo Y, Li Y, He C, Wu L, Wang B, Liu H, Shi G.   +8 more
europepmc   +1 more source

A multi-node-upset-resilient 14T SRAM with high read stability for space applications

Nuclear Engineering and Technology
This paper proposes a voltage-booster read-decoupled radiation-hardened 14T (BDRH14T) SRAM cell. In harsh environments such as space, radiation can flip the stored data in memory cells, resulting in soft errors, including single-event upset (SEU) and ...
Sung-Jun Lim, Sung-Hun Jo
doaj   +1 more source

A High-Reliability 12T SRAM Radiation-Hardened Cell for Aerospace Applications. [PDF]

Micromachines (Basel), 2023
Yao R, Lv H, Zhang Y, Chen X, Zhang Y, Liu X, Bai G.   +6 more
europepmc   +1 more source

A Radiation-Hardened Triple Modular Redundancy Design Based on Spin-Transfer Torque Magnetic Tunnel Junction Devices

Applied Sciences
Integrated circuits suffer severe deterioration due to single-event upsets (SEUs) in irradiated environments. Spin-transfer torque magnetic random-access memory (STT-MRAM) appears to be a promising candidate for next-generation memory as it shows ...
Shubin Zhang, Peifang Dai, Ning Li, Yanbo Chen   +3 more
doaj   +1 more source

Reliability Analysis of the LEON3 Memory Subsystem Under Single-Event Upsets: Cache, AHB Interface, and Memory Controller Vulnerability

Information
This paper presents a register-transfer-level (RTL) fault injection study of the LEON3 processor’s internal memory subsystem under single-event upsets (SEUs). The analysis targets four key components: the instruction cache (I-cache), data cache (D-cache),
Afef Kchaou, Sehmi Saad, Hatem Garrab
doaj   +1 more source

Radiation-Hardened 20T SRAM with Read and Write Optimization for Space Applications

Applied Sciences
With continued CMOS scaling, transistor miniaturization has significantly raised SRAM integration density while lowering the critical charge (Qc), increasing cell vulnerability to spaceborne high-energy particles.
Kon-Woo Kim, Eun Gyo Jeong, Sung-Hun Jo
doaj   +1 more source

A ReRAM-Based Non-Volatile and Radiation-Hardened Latch Design. [PDF]

Micromachines (Basel), 2022
Yan A, Wei S, Chen Y, Fan Z, Huang Z, Cui J, Girard P, Wen X.   +7 more
europepmc   +1 more source

Analytical and Numerical Investigation of Nanowire Transistor X-ray Detector. [PDF]

Materials (Basel), 2023
Ellakany A, Zekry A, Zekry A, Abouelatta M, Shaker A, Sayah GT, El-Banna MM.   +6 more
europepmc   +1 more source

Effect of Total Dose Irradiation on Parasitic BJT in 130 nm PDSOI MOSFETs. [PDF]

Micromachines (Basel), 2023
Jia Y, Zhang Z, Bi D, Hu Z, Zou S.
europepmc   +1 more source