Results 11 to 20 of about 134,958 (300)

FPGA based time-to-digital converters [PDF]

Quantum Technologies 2020, 2020
Time-to-digital converters are a key component in many photonics systems, ranging from LiDAR, quantum key distribution, quantum optics experiments and time correlated single photon counting applications. A novel efficient timeto- digital converter non-linearity calibration technique has been developed and demonstrated on a Spartan 6 LX150 field ...
Nock, Richard W., Ai, Xiao, Lu, Yang, Dahnoun, Naim, Rarity, John G.   +4 more
openaire   +2 more sources

Area-Efficient Mixed-Signal Time-to-Digital Converter Integration for Time-Resolved Photon Counting [PDF]

Sensors
Digital histogram generation for time-resolved measurements with single-photon avalanche diode (SPAD) sensors requires the storage of many timestamp signals.
Sergio Moreno, Victor Moro, Joan Canals, Angel Diéguez   +3 more
doaj   +2 more sources

A Successive Approximation Time-to-Digital Converter with Single Set of Delay Lines for Time Interval Measurements [PDF]

Sensors, 2019
The paper is focused on design of time-to-digital converters based on successive approximation (SA-TDCs—Successive Approximation TDCs) using binary-scaled delay lines in the feedforward architecture. The aim of the paper is to provide a tutorial on
Jakub Szyduczyński, Dariusz Kościelnik, Marek Miśkowicz   +2 more
doaj   +2 more sources

Design of Reconfigurable Time-to-Digital Converter Based on Cascaded Time Interpolators for Electrical Impedance Spectroscopy [PDF]

Sensors, 2020
This paper presents a reconfigurable time-to-digital converter (TDC) used to quantize the phase of the impedance in electrical impedance spectroscopy (EIS).
Sounghun Shin, Yoontae Jung, Soon-Jae Kweon, Eunseok Lee, Jeong-Ho Park, Jinuk Kim, Hyung-Joun Yoo, Minkyu Je   +7 more
doaj   +2 more sources

Exponential extended flash time-to-digital converter [PDF]

2016 Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP), 2016
The digital-to-time converter (DTC)-based all-digital phase locked loop (ADPLL) attracts more and more attention due to its ultra-lower power consumption characteristic [1]. With DTC, the time-to-digital converter's (TDC) requirements are relaxed, not only for its range but also for its nonlinearity. However, the shortened TDC range, which is less than
Peng Chen 0022, Robert Bogdan Staszewski
openaire   +3 more sources

A Digital PLL with a Stochastic Time-to-Digital Converter [PDF]

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers., 2006
A new dual-loop digital phase-locked loop (DPLL) architecture is presented. It employs a stochastic time-to-digital converter (STDC) and a high-frequency delta-sigma dithering to achieve wide PLL bandwidth and low jitter at the same time. The STDC exploits the stochastic properties of a set of latches to achieve high resolution.
Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kerem Ok, Un-Ku Moon, Kartikeya Mayaram   +4 more
openaire   +2 more sources

Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA [PDF]

Sensors
Time-to-Digital Converters (TDCs) implemented on Field-Programmable Gate Arrays (FPGAs) have become increasingly prevalent across a wide range of scientific and engineering disciplines, such as high-energy physics experiments, autonomous driving, robotic
Riguang Chen, Ping Chen, Kuinian Li, Hulin Liu   +3 more
doaj   +2 more sources

Designing a time-to-digital converter using quantum-dot cellular automata nanotechnology [PDF]

Scientific Reports
As a nanoscale computing paradigm, quantum-dot cellular automata (QCA) technology demonstrates significant advantages over conventional CMOS implementations, including improved device density, minimized power dissipation, and increased operational speed.
Shahram Modanlou, Mohammad Gholami
doaj   +2 more sources

A Coarse-Fine Time-to-Digital Converter

ITM Web of Conferences, 2017
A design of time-to-digital converter (TDC) using a coarse-fine conversion scheme is presented. The coarse stage was accomplished by a delay line, and used a loop counter at the end of the delay line to achieve wide dynamic range. The fine stage utilized
Chen Ya-Qian, Meng Li-Ya, Lin Xiao-Gang
doaj   +2 more sources

A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification [PDF]

Radioengineering, 2015
This paper investigates a novel cyclic time-to-digital converter (TDC) which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop).
M. Rezvanyvardom, E. Farshidi
doaj   +2 more sources