Results 161 to 170 of about 3,473 (197)
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IEEE Journal of Solid-State Circuits, 2019
A phenomenon called parallel-output misalignment (POM), which intrinsically occurs in ring-type time-to-digital converters (TDCs) like gated-ring oscillator (GRO) or Vernier-ring TDCs, is discussed in this paper. We found that the phase noise caused by POM error may be larger than that due to quantization error by up to 22 dB or even more.
Tuoxin Wang +2 more
openaire +1 more source
A phenomenon called parallel-output misalignment (POM), which intrinsically occurs in ring-type time-to-digital converters (TDCs) like gated-ring oscillator (GRO) or Vernier-ring TDCs, is discussed in this paper. We found that the phase noise caused by POM error may be larger than that due to quantization error by up to 22 dB or even more.
Tuoxin Wang +2 more
openaire +1 more source
A Two-Stage Interpolation Time-to-Digital Converter Implemented in 20 and 28 nm FGPAs
IEEE transactions on industrial electronics (1982. Print)This article presents a two-stage interpolation time-to-digital converter (TDC), combining a Vernier gray code oscillator TDC (VGCO-TDC) and a tapped-delay line TDC (TDL-TDC).
Yu Wang +4 more
semanticscholar +1 more source
Wireless Personal Communications, 2018
Phase locked loops (PLLs) are utilized as a part of clock recovery and frequency synthesis. Entirely digital PLLs are more reasonable for the solid execution with different circuits contrasted with the customary usage of the PLLs. The all-digital PLLs are additionally autonomous of process varieties and can be efficiently ported to various innovations.
T. M. Sathish Kumar, P. S. Periasamy
openaire +1 more source
Phase locked loops (PLLs) are utilized as a part of clock recovery and frequency synthesis. Entirely digital PLLs are more reasonable for the solid execution with different circuits contrasted with the customary usage of the PLLs. The all-digital PLLs are additionally autonomous of process varieties and can be efficiently ported to various innovations.
T. M. Sathish Kumar, P. S. Periasamy
openaire +1 more source
IEEE Transactions on Nuclear Science, 2019
In a field-programmable gate array (FPGA)-based time-to-digital converter (TDC), the hit signal to be measured launches out a segment of the clock-like signal propagating along the tapped delay line (TDL).
Yonggang Wang +4 more
semanticscholar +1 more source
In a field-programmable gate array (FPGA)-based time-to-digital converter (TDC), the hit signal to be measured launches out a segment of the clock-like signal propagating along the tapped delay line (TDL).
Yonggang Wang +4 more
semanticscholar +1 more source
A Novel Flash-Type Time-To-Digital Converters (TDC) Using GDI Technique
2022Jakka Yeshwanth Reddy +4 more
openaire +1 more source
Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC
2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI), 2022Rodrigo N. Wuerdig +3 more
openaire +1 more source
A High-Precision Folding Time-to-Digital Converter Implemented in Kintex-7 FPGA
IEEE Transactions on Instrumentation and Measurement, 2023Yonghang Zhou +3 more
semanticscholar +1 more source
Photothermal Nanomaterials: A Powerful Light-to-Heat Converter
Chemical Reviews, 2023Ximin Cui, Qifeng Ruan, Xiaolu Zhuo
exaly
IEEE Nuclear Science Symposium Conference Record, 2011
E. Bayer, P. Zipf, M. Traxler
semanticscholar +1 more source
E. Bayer, P. Zipf, M. Traxler
semanticscholar +1 more source
Continuous wideband microwave-to-optical converter based on room-temperature Rydberg atoms
Nature Photonics, 2023, Mateusz Mazelanik, Michał Parniak
exaly