Results 91 to 100 of about 1,083 (193)
In this work we report the fabrication, co-integration and resulting performance of 2D/2D van der Waals (vdW) Vertical p-type Tunnel FETs and p-MOSFETs in a WSe2/SnSe2 material system.
Capua, L. +3 more
core +1 more source
This article outlines how artificial intelligence could reshape the design of next‐generation transistors as traditional scaling reaches its limits. It discusses emerging roles of machine learning across materials selection, device modeling, and fabrication processes, and highlights hierarchical reinforcement learning as a promising framework for ...
Shoubhanik Nath +4 more
wiley +1 more source
Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology
Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh +3 more
wiley +1 more source
Performance Investigation of Source Extension Approach on III–V Vertical Tunnel FET
A triple-metal-gate stacked III–V vertical tunnel field-effect transistor (TM-GS-VTFET) structure is examined. There are two different TM-GS-VTFETs: Device-A, which uses a source pocket, and Device-B, which uses a new source extension approach ...
M. Saravanan, Eswaran Parthasarathy
doaj +1 more source
Exploiting Ferroelectric and Spintronic Dynamics for Neural Network Computation
Ferroelectric and spintronic devices, relying on the control of polarization and magnetization, offer intrinsically fast, durable, energy‐efficient, and low‐latency building blocks for analog in‐memory computing. The hysteretic dynamics of an order parameter are leveraged to provide nonvolatile, multistate memory and nonlinear switching. Brain‐inspired
Dashiell Harrison +4 more
wiley +1 more source
On the Optimization of SiGe and III-V Compound Hetero-Junction Tunnel FET Devices
We investigate the operation and performance of planar SiGe/Si and n0.53Ga0.47As/In0.7Ga0.3As/In0.53Ga0.47As hetero-junction Semiconductor on Insulator (ScOI) Tunnel FET (TFET) devices.
SELMI, Luca +9 more
core +1 more source
The Dimensional Revolution of Phosphorus: From Allotropicity to Battery System Applications
Phosphorus‐based materials are promising high‐capacity anodes classified by dimension (0D–3D) to systematically explore their properties and composite strategies. When combined with materials such as carbon to form heterostructures, the electrical conductivity and stability are effectively enhanced.
Shuhan Zhang +8 more
wiley +1 more source
TBAL: Tunnel FET-Based Adiabatic Logic for Energy-Efficient, Ultra-Low Voltage IoT Applications
A novel, tunnel field-effect transistor (TFET)-based adiabatic logic (TBAL) circuit topology has been proposed, evaluated and benchmarked with several device architectures (planar MOSFET, FinFET, and TFET) and AL implementations (efficient charge ...
Jheng-Sin Liu +2 more
doaj +1 more source
Metal-CH3NH3PbI3-Metal Tunnel FET
A novel-gated structure of aluminum (Al)-perovskite (CH3NH3PbI3)-indium tin oxide (ITO), with Al as source and ITO as drain terminals, has been reported. Ambipolar nature of CH3NH3PbI3 has been explored for the device channel.
Agrawal, Kalpana +3 more
core
Low‐dimensional materials (0D, 1D, and 2D) exhibit unique electronic and physicochemical properties, enabling advanced nanoelectronic and optoelectronic devices. Mixed‐dimensional heterostructures combine these materials to enhance functionality.
Qaisar Alam +3 more
wiley +1 more source

